AD7750

–11–

REV. 0

Table II. Maximum Output Frequencies

H(s) =

sRC

1 + sRC

R

C

R = 1M

C = 0.0707 F

Figure 16. HPF in Channel 1

C1

47nF

R2

33k

C2

33nF

VR2

200

R1

1M

PIN 7

VR1

100

R3

1.1k

860:1 ATTENUTATION

PIN 6

R4

1.1k

C3

33 F

Figure 17. Phase Lag Compensation on Channel 1 for

60 Hz Line Frequency

ADC 1

PGA

F1

F2

ADC 2

τ

X2

G1

ACDC

HPF

PHASE LEAD OF

2.58 C AT 50Hz

DIGITAL

MULTIPLIER

LPF

CLKIN

FS

S2

S1

TIME DELAY 143 s

(CLKIN = 3.5795MHz)

2.58 C AT 50Hz

DIGITAL-TO-FREQUENCY BLOCK

COUNTER/ACCUMULATOR

DTF

Figure 15. Equivalent AD7750 Signal Processing Chain

e

d

o

MS

F2

S1

S

)

z

H

(

2

F

,

1

F

)

C

D

(

F

T

U

O

)

z

H

(

)

C

D

(

)

z

H

(

2

F

,

1

F

)

C

A

(

F

T

U

O

)

z

H

(

)

C

A

(

00

0

0

9

.

2

±

8

.

66

4

±

9

0

15

4

.

1

±

8

.

63

2

±

9

0

1

10

0

1

9

.

2

o

t

03

2

o

t

05

4

.

1

o

t

05

.

1

1

o

t

0

20

1

0

9

.

2

o

t

06

4

o

t

05

4

.

1

o

t

03

2

o

t

0

30

1

1

9

.

2

±

8

.

62

4

1

±

8

1

25

4

.

1

±

8

.

62

4

1

±

8

1

2

41

0

0

8

.

5

±

6

.

3

12

9

±

8

1

29

.

2

±

6

.

3

16

4

±

8

1

2

51

0

1

8

.

5

o

t

02

9

o

t

09

.

2

o

t

06

4

o

t

0

61

1

0

8

.

5

o

t

04

8

1

o

t

09

.

2

o

t

02

9

o

t

0

71

1

1

8

.

5

±

6

.

3

12

4

1

±

8

1

29

.

2

±

6

.

3

12

4

1

±

8

1

2

Digital-to-Frequency Converter (DTF)

After they have been filtered, the outputs of the two sigma-delta

modulators are fed into a digital multiplier. The output of the

multiplier is then low-pass filtered to obtain the real power

information. The output of the LPF enters a digital-to-frequency

converter whose output frequency is now proportional to the

real power. The DTF offers a range of output frequencies to

suit most power measurement applications. There is also a high

tion purposes. The output frequencies are determined by the

logic inputs FS, S2 and S1. This is explained in the section of

this data sheet called Determining the Output Frequencies of

the AD7750.

Figure 18 shows the waveforms of the various frequency out-

puts. The outputs F1 and F2 are the low frequency outputs

that can be used to directly drive a stepper motor or electrome-

chanical pulse counter. The F1 and F2 outputs provide two

alternating low going pulses. The pulsewidth is set at 275 ms

and the time between the falling edges of F1 and F2 is ap-

proximately half the period of F1. If, however, the period of

F1 and F2 falls below 550 ms (1.81 Hz) the pulsewidth of F1

and F2 is set to half the period. For example in Mode 3,

where F1 and F2 vary around 6.8 Hz, the pulsewidth would vary

from 1/2.(6.8+1.45) seconds to 1/2.(6.8–1.45) seconds—see

Table II.