AD7888AR datasheet(2/16 Pages) AD

2 / 16 page

REV. B

–2–

AD7888–SPECIFICATIONS (V

DD = 2.7 V to 5.25 V, REFIN/REFOUT = 2.5 V External/Internal Reference unless

otherwise noted; fSCLK = 2 MHz (VDD = 2.7 V to 5.25 V); TA = TMIN to TMAX, unless otherwise noted.)

Parameter

A Version

B Version

Unit

Test Condition/Comment

DYNAMIC PERFORMANCE

Signal to Noise + Distortion Ratio2, 3 (SNR)

dB typ

fIN = 10 kHz Sine Wave, fSAMPLE = 125 kSPS

Total Harmonic Distortion

2 (THD)

–80

dB typ

fIN = 10 kHz Sine Wave, fSAMPLE = 125 kSPS

Peak Harmonic or Spurious Noise

–80

dB typ

fIN = 10 kHz Sine Wave, fSAMPLE = 125 kSPS

Intermodulation Distortion2 (IMD)

Second Order Terms

–78

dB typ

fa = 9.983 kHz, fb = 10.05 kHz, fSAMPLE = 125 kSPS

Third Order Terms

–78

dB typ

fa = 9.983 kHz, fb = 10.05 kHz, fSAMPLE = 125 kSPS

Channel-to-Channel Isolation2

–80

dB typ

fIN = 25 kHz

Full Power Bandwidth

2.5

MHz typ

@ 3 dB

DC ACCURACY

Any Channel

Resolution

Bits

Integral Nonlinearity

±2

±1

LSB max

Differential Nonlinearity

±2

–1/+1.5

LSB max

Guaranteed No Missed Codes to 11 Bits (A Grade)

Guaranteed No Missed Codes to 12 Bits (B Grade)

Offset Error

±6

LSB max

VDD = 4.75 V to 5.25 V (Typically

±3 LSB)

±4.5

LSB max

VDD = 2.7 V to 3.6 V (Typically

±2 LSB)

Offset Error Match

LSB typ

Gain Error

±2

LSB max

Typically 30 LSB with Internal Reference

Gain Error Match

LSB max

ANALOG INPUT

Input Voltage Ranges

0 to VREF

Volts

Leakage Current

±1

µA max

Input Capacitance

pF typ

When in Track

pF typ

When in Hold

REFERENCE INPUT/OUTPUT

REFIN Input Voltage Range

2.5/VDD

V min/max

Functional from 1.2 V

Input Impedance

Ω typ

Very High Impedance If Internal Reference Disabled

REFOUT Output Voltage

2.45/2.55

V min/max

REFOUT Tempco

±50

ppm/

°C typ

LOGIC INPUTS

Input High Voltage, VINH

2.4

V min

VDD = 4.75 V to 5.25 V

2.1

V min

VDD = 2.7 V to 3.6 V

Input Low Voltage, VINL

0.8

V max

VDD = 2.7 V to 5.25 V

Input Current, IIN

±10

µA max

Typically 10 nA, VIN = 0 V or VDD

Input Capacitance, CIN

pF max

LOGIC OUTPUTS

Output High Voltage, VOH

ISOURCE = 200

µA

VDD – 0.5

V min

VDD = 2.7 V to 5.25 V

Output Low Voltage, VOL

0.4

V max

ISINK = 200

µA

Floating-State Leakage Current

±10

µA max

Floating-State Output Capacitance

pF max

Output Coding

Straight (Natural) Binary

CONVERSION RATE

Throughput Time

SCLK Cycles

Conversion Time + Acquisition Time. 125 kSPS with

2 MHz Clock

Track/Hold Acquisition Time

1.5

SCLK Cycles

Conversion Time

14.5

SCLK Cycles

7.25

µs (2 MHz Clock)

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