AD9012 datasheet(3/8 Pages) AD

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REV. D

–3–

AD9012

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD9012 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

NOTES

1Measured with Analog Input = 0 V.

2Measured by FFT analysis where fundamental is –3 dBc.

3Input slew rate derived from rise time (10% to 90%) of full-scale step input.

4Outputs terminated with two equivalent ’LS00 type loads. (See load circuit.)

5Measured from ENCODE into data out for LSB only.

6For full-scale step input, 8-bit accuracy is attained in specified time.

7Recovers to 8-bit accuracy in specified time, after 150% full-scale input overvoltage.

8Output time skew includes high-to-low and low-to-high transitions as well as

bit-to-bit time skew differences.

9ENCODE signal rise/fall times should be less than 30 ns for normal operation.

10Measured at 75 MSPS encode rate. Harmonic data based on worst case harmonics.

11Analog input frequency = 1.23 MHz.

12RMS signal to rms noise, including harmonics with 1.23 MHz. analog input

signal.

13NPR measured @ 0.5 MHz. Noise Source is 250 mW (rms) from 0.5 MHz

to 8 MHz.

14Supplies should remain stable within

±5% for normal operation.

15Measured at –5.2 V

± 5% and +5.0 V ± 5%.

Specifications subject to change without notice.

ORDERING GUIDE

Temperature

Package

Device

Linearity

Ranges

Options*

AD9012AQ

0.75 LSB

–25

°C to +85°C

Q-28

AD9012BQ

0.50 LSB

–25

°C to +85°C

Q-28

AD9012AJ

0.75 LSB

–25

°C to +85°C

J-28A

AD9012BJ

0.50 LSB

–25

°C to +85°C

J-28A

AD9012SQ

0.75 LSB

–55

°C to +125°C

Q-28

AD9012SE

0.75 LSB

–55

°C to +125°C

E-28A

AD9012TQ

0.50 LSB

–55

°C to +125°C

Q-28

AD9012TE

0.50 LSB

–55

°C to +125°C

E-28A

*E = Leadless Ceramic Chip Carrier; J = Ceramic Leaded Chip Carrier;

Q = Cerdip.

EXPLANATION OF TEST LEVELS

Test Level

– 100% production tested.

II – 100% production tested at +25

°C, and sample tested at

specified temperatures. AC testing done on sample basis.

III – Sample tested only.

IV – Parameter is guaranteed by design and characterization

testing.

V – Parameter is a typical value only.

VI – All devices are 100% production tested at +25

°C. 100%

production tested at temperature extremes for extended

temperature devices; guaranteed by design and

characterization testing for industrial devices.

ABSOLUTE MAXIMUM RATINGS

Positive Supply Voltage (+VS) . . . . . . . . . . . . . . . . . . . . . +6 V

Analog to Digital Supply Voltage Differential (–VS) . . . . 0.5 V

Negative Supply Voltage (–VS) . . . . . . . . . . . . . . . . . . . . –6 V

Analog Input Voltage . . . . . . . . . . . . . . . . . . . . . –VS to +0.5 V

ENCODE Input Voltage . . . . . . . . . . . . . . . . . –0.5 V to +5 V

OVERFLOW INH Input Voltage . . . . . . . . . . . –5.2 V to 0 V

Reference Input Voltage (+VREF –VREF)

. . . . –3.5 V to +0.1 V

Differential Reference Voltage . . . . . . . . . . . . . . . . . . . . . 2.1 V

Reference Midpoint Current . . . . . . . . . . . . . . . . . . . .

±4 mA

Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . 30 mA

Operating Temperature Range

AD9012AQ/BQ/AJ/BJ . . . . . . . . . . . . . . . . –25

°C to +85°C

AD9012SE/SQ/TE/TQ . . . . . . . . . . . . . . –55

°C to +125°C

Storage Temperature Range . . . . . . . . . . . . –65

°C to +150°C

Junction Temperature3 . . . . . . . . . . . . . . . . . . . . . . . . +175

°C

Lead Soldering Temperature (10 sec) . . . . . . . . . . . . . +300

°C

NOTES

1Absolute maximum ratings are limiting values, to be applied individually, and

beyond which the serviceability of the circuit may be impaired. Functional

operability under any of these conditions is not necessarily implied. Exposure to

absolute maximum rating conditions for extended periods may affect device

reliability.

2+V

REF ≥ –VREF under all circumstances.

3Maximum junction temperature (t

J max) should not exceed +175°C for ceramic

packages, and +150

°C for plastic packages:

tJ = PD (θJA) + tA

PD (

JC) + tc

where

PD = power dissipation

JA = thermal impedance from junction to ambient ( °C/W)

JC = thermal impedance from junction to case ( °C/W)

tA = ambient temperature (°C)

tC = case temperature (°C)

typical thermal impedances are:

Ceramic DIP

JA = 42°C/W; θJC = 10°C/W

Ceramic LCC

JA = 50°C/W; θJC = 15°C/W

JLCC

JA = 59°C/W; θJC = 15°C/W.

Recommended Operating Conditions

Input Voltage

Parameter

Min

Nominal

Max

–VS

–5.46

–5.20

–4.94

+VS

+4.75

5.00

+5.25

+VREF

–VREF

0.0 V

+0.1

–VREF

–2.1

–2.0

+VREF

Analog Input

–VREF

+VREF

TTL

OUTPUT

15pF

Figure 1. Load Circuit

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