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AD9805JS 数据表(PDF) 7 Page - Analog Devices

部件名 AD9805JS
功能描述  Complete 12-Bit/10-Bit 6 MSPS CCD/CIS Signal Processors
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9805JS 数据表(HTML) 7 Page - Analog Devices

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AD9807/AD9805
–7–
REV. 0
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9807/AD9805 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS*
With
Respect
Parameter
to
Min
Max
Units
AVDD
AVSS
–0.5
+6.5
Volts
AVSS
AVDD
–6.5
+0.5
Volts
DVDD
DVSS
–0.5
+6.5
Volts
AGND
DVSS
–0.3
+0.3
Volts
AVDD
DVDD
–6.5
+6.5
Volts
Clock Input
DVSS
–0.5
DVDD + 0.5 Volts
Digital Outputs
DVSS
–0.5
AVDD + 0.3 Volts
AIN, VREF
AVSS
–0.3
AVDD + 0.3 Volts
Junction Temperature
+150
°C
Storage Temperature
–65
+150
°C
Lead Temperature (10 sec)
+300
°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Package
Package
Model
Range
Description
Option*
AD9807JS
0
°C to +70°C
PQFP
S-64
AD9805JS
0
°C to +70°C
PQFP
S-64
*S = Plastic Quad Flatpack.
DEFINITIONS OF SPECIFICATIONS
INTEGRAL NONLINEARITY
Linearity error refers to the deviation of each individual code
from a line drawn from “negative full scale” through “positive
full scale.” The point used as “negative full scale” occurs 1/2 LSB
before the first code transition. “Positive full scale” is defined as a
level 1 1/2 LSB beyond the last code transition. The deviation is
measured from the middle of each particular code to the true
straight line.
DIFFERENTIAL LINEARITY ERROR (DNL, NO MISSING
CODES)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Thus every
code must have a finite width. Guaranteed no missing codes
to 12-bit resolution indicates that all 4096 codes, respectively,
must be present over all operating ranges.
UNIPOLAR OFFSET ERROR
In the unipolar mode, the first transition should occur at a level
1/2 LSB above analog common. Unipolar offset is defined as
the deviation of the actual from that point. The unipolar offset
temperature coefficient specifies the maximum change of the
transition point over temperature, with or without external
adjustments.
GAIN ERROR
The last transition should occur for an analog value 1 1/2 LSB
below the nominal full scale. Gain error is the deviation of the
actual difference between first and last code transitions and the
ideal difference between first and last code transitions.
POWER SUPPLY REJECTION
Power Supply Rejection specifies the maximum full-scale change
from the initial value with the supplies at the various limits.
APERTURE DELAY
Aperture delay is a timing measurement between the sampling
clocks and the CDS. It is measured from the falling edge of the
CDSCLK2 input to when the input signal is held for conversion
in CDS mode. In non-CDS mode, it is the falling edge of
CDSCLK1.



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