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NCP1253 数据表(PDF) 3 Page - ON Semiconductor |
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NCP1253 数据表(HTML) 3 Page - ON Semiconductor |
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3 / 15 page ![]() NCP1253 http://onsemi.com 3 S R Q Q 65 kHz 100 kHz clock vdd Frequency modulation Vcc Drv Vcc logic management and fault timer vdd power on reset Rramp LEB VDD RFB / 4.2 IpFlag 4 ms SS IpFlag GND CS FB Frequency foldback Vskip The soft−start is activated during: − the startup sequence − the auto−recovery burst mode Vlimit Vfold Clamp 20us time constant VOVP VFB < 1.05 V ? setpoint = 250 mV 250 mV peak current freeze UVLO BO Power on reset S R Q Q Rlim Figure 2. Internal Circuit Architecture |
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