ADM223/ADM230L–ADM241L

–12–

REV. 0

10

90

100

0%

5V

0.8 V

A3

5V

5

B

L w

1ms

H

O

Figure 30. Charge Pump, V+, V– Exiting Shutdown

10

90

100

0%

5V

0.8 V

A3

5

B

L w

5µs

H

O

Figure 31. Transmitter Output Loaded Slew Rate

10

90

100

0%

5V

0.8 V

A3

5

B

L w

1µs

H

O

Figure 32. Transmitter Output Unloaded Slew Rate

GENERAL INFORMATION

The ADM223/ADM230L–ADM241L family of RS-232 drivers/

receivers are designed to solve interface problems by meeting

the EIA-232-E specifications while using a single digital +5 V

supply. The EIA-232-E standard requires transmitters which

will deliver

±5 V minimum on the transmission channel and

receivers which can accept signal levels down to

±3 V. The

ADM223/ADM230L–ADM241L meet these requirements by

integrating step up voltage converters and level shifting trans-

mitters and receivers onto the same chip. CMOS technology is

used to keep the power dissipation to an absolute minimum. A

comprehensive range of transmitter/receiver combinations is

available to cover most communications needs.

The ADM223, ADM230L, ADM235L, ADM236L and

ADM241L are particularly useful in battery powered systems as

they feature a low power shutdown mode which reduces power

dissipation to less than 5

µW.

The ADM233L and ADM235L are designed for applications

where space saving is important as the charge pump capacitors

are molded into the package.

The ADM231L and ADM239L include only a negative charge

pump converter and are intended for applications where a posi-

tive 12 V is available.

To facilitate sharing a common line or for connection to a micro-

processor data bus the ADM235L, ADM236L, ADM239L and

ADM241L feature an enable (EN, EN) function. When disabled,

the receiver outputs are placed in a high impedance state.

CIRCUIT DESCRIPTION

The internal circuitry in the ADM230L–ADM241L consists of

three main sections. These are:

(a) A charge pump voltage converter

(b) RS-232 to TTL/CMOS receivers

(c) TTL/CMOS to RS-232 transmitters

Charge Pump DC-DC Voltage Converter

The charge pump voltage converter consists of an oscillator and

a switching matrix. The converter generates a

±10 V supply

from the input 5 V level. This is done in two stages using a

switched capacitor technique as illustrated in Figures 33 and 34.

First, the 5 V input supply is doubled to 10 V using capacitor

C1 as the charge storage element. The 10 V level is then in-

verted to generate –10 V using C2 as the storage element.

S1

S3

S2

S4

INTERNAL

OSCILLATOR

C1

C3

GND

Figure 33. Charge-Pump Voltage Doubler