ADMC300 datasheet(1/42 Pages) AD

部件名	ADMC300

功能描述	High Performance DSP-Based Motor Controller

PDF	42 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

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REV. B

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

a

ADMC300

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

World Wide Web Site: http://www.analog.com

Fax: 781/326-8703

FUNCTIONAL BLOCK DIAGRAM

ARITHMETIC UNITS

SHIFTER

MAC

ALU

MEMORY

SPORT 1

INTERVAL

TIMER

DATA

RAM

1K

16

PROGRAM

ROM

2K

24

PROGRAM

RAM

4K

24

PROGRAM

INTERRUPT

CONTROLLER

ENCODER

INTERFACE

PWM

GENERATION

SIGMA-DELTA

ADCs

AUXILIARY

PWM

ADSP-2100 BASE

ARCHITECTURE

SERIAL PORTS

PROGRAM

SEQUENCER

DATA

ADDRESS

GENERATORS

DAG 1

DAG 2

PROGRAM MEMORY ADDRESS BUS

DATA MEMORY ADDRESS BUS

PROGRAM MEMORY DATA BUS

DATA MEMORY DATA BUS

SPORT 0

WATCH-

DOG

TIMER

EVENT

CAPTURE

TIMERS

DIGITAL

I/O

32

12

7

10

2

56

MOTOR CONTROL

PERIPHERALS

High Performance DSP-Based

Motor Controller

TARGET APPLICATIONS

Industrial Drives, Servo Drives, Variable Speed Drives,

Electric Vehicles

FEATURES

25 MIPS Fixed-Point DSP Core

Single Cycle Instruction Execution (40 ns)

ADSP-2100 Family Code Compatible

Independent Computational Units

ALU

Multiplier/Accumulator

Barrel Shifter

Multifunction Instructions

Single Cycle Context Switch

Powerful Program Sequencer

Zero Overhead Looping

Conditional Instruction Execution

Two Independent Data Address Generators

Memory Configuration

4K

24-Bit Program Memory RAM

2K

24-Bit Program Memory ROM

1K

16-Bit Data Memory RAM

High-Resolution Multichannel ADC System

Five Independent 16-Bit Sigma-Delta ADCs

76 dB SNR Typical (ENOB > 12 Bits)

Arranged in Two Independently Clocked Banks

Differential or Single-Ended Inputs

Programmable Sample Frequency to 32.5 kHz

Flexible Synchronization of ADC and PWM Subsystems

Independent Offset Calibration for Each Channel

Two Dedicated ADC Interrupts

Internal 2.5 V Reference

Three Multiplexer Control Pins for External Expansion

Hardware or Software Convert Start

Individual Power-Down for Each Bank

Three-Phase PWM Generation Subsystem

16-Bit Dedicated PWM Generator

Edge Resolution to 40 ns

Programmable Dead Time

Programmable Minimum Pulsewidth

Double Update Mode Allows Duty Cycle

Adjustment on Half Cycle Boundaries

Special Features for Brushless DC Motors

Hardwired Polarity Control

External Dedicated Asynchronous Shutdown Pin

(

PWMTRIP)

Additional Shutdown Pins in I/O System

Individual Enable/Disable of Each Output

High Frequency Chopping Mode

Transparent Transition to Overmodulation

Range with Duty Cycles of 100%

Programmable Interrupt Controller Manages Priority

and Masking of 11 Peripheral Interrupts

(Continued on Page 7)

类似零件编号 - ADMC300

制造商	部件名	数据表	功能描述
Analog Devices	ADMC300	296Kb / 42P	High Performance DSP-Based Motor Controller REV. B

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类似说明 - ADMC300

制造商	部件名	数据表	功能描述
Analog Devices	ADMC326	219Kb / 31P	28-Lead ROM-Based DSP Motor Controller REV.A
	ADMC328	234Kb / 32P	28-Lead ROM-Based DSP Motor Controller with Current Sense REV.B
	ADMC330	163Kb / 20P	Single Chip DSP Motor Controller REV.0
	ADMC401	417Kb / 60P	Single-Chip, DSP-Based High Performance Motor Controller REV.B
	ADMC331BSTZ	247Kb / 36P	Single Chip DSP Motor Controller REV. B
	ADMC300	296Kb / 42P	High Performance DSP-Based Motor Controller REV. B
	ADMC326	240Kb / 32P	28-Lead ROM-Based DSP Motor Controller REV. C
	ADMC328	248Kb / 32P	28-Lead ROM-Based DSP Motor Controller with Current Sense REV. C
	ADMC331	247Kb / 36P	Single Chip DSP Motor Controller REV. B
	ADMC401	414Kb / 60P	Single-Chip, DSP-Based High Performance Motor Controller REV. B

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