REV. 0

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a

ADP3410

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

World Wide Web Site: http://www.analog.com

Fax: 781/326-8703

© Analog Devices, Inc., 1999

Dual MOSFET Driver

with Bootstrapping

FEATURES

All-In-One Synchronous Buck Driver

One PWM Signal Generates Both Drives

Anticross-Conduction Protection Circuitry

Programmable Transition Delay

Synchronous Override Control

Undervoltage Lockout

Programmable Overvoltage Shutdown

Shutdown Quiescent Current < 10

A

APPLICATIONS

Mobile Computing CPU Core Power Converters

Multiphase Desktop CPU Supplies

Single-Supply Synchronous Buck Converters

Standard-to-Synchronous Converter Adaptations

GENERAL DESCRIPTION

The ADP3410 is a dual MOSFET driver optimized for driving

two N-channel FETs that are the two switches in the non-

isolated synchronous buck power converter topology. Each of

the drivers is capable of driving a 3000 pF load with a 20 ns

propagation delay and a 30 ns transition time. One of the drivers

can be bootstrapped, and is designed to handle the high-voltage

slew rate associated with “floating” high-side gate drivers. The

ADP3410 has several protection features: overlapping drive

prevention (ODP), undervoltage lockout (UVLO) with perform-

ance specified at very low VCC levels, and overvoltage protection

(OVP) that can be used to monitor either the input or output.

Additional features include: programmable transition delay, a

synchronous drive override control pin, a synchronous drive

status monitor and, in conjunction with exiting from the UVLO

load. The quiescent current, when the device is disabled, is less

than 10

µA.

GND

PGND

SD

IN

DRVLSD

SRMON

OVPSET

DLY

VCC

VCCGD

BST

DRVH

SW

DRVL

ADP3410

TO PWM

CONTROLLER

5V

Figure 1. Typical Application Circuit

FUNCTIONAL BLOCK DIAGRAM

CONTROL

AND

OVERLAP

PROTECTION

CIRCUIT

ADP3410

4.4V

1.2V

VCC

VCCGD

GND

SD

IN

DLY

OVPSET

DRVLSD

PGND

BST

DRVH

SW

DRVL

SRMON