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DAC16 数据表(PDF) 2 Page - Analog Devices |
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DAC16 数据表(HTML) 2 Page - Analog Devices |
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2 / 12 page  DAC16–SPECIFICATIONS ELECTRICAL CHARACTERISTICS Parameter Conditions Min Typ Max Units Integral Linearity “G” INL TA = +25°C–2 ±1.2 +2 LSB Integral Linearity “G” INL –4 ±1.6 +4 LSB Differential Linearity “G” DNL TA = +25°C–1 ±0.5 +1 LSB Differential Linearity “G” DNL –1 ±0.7 +1.5 LSB Integral Linearity “F” INL TA = +25°C–4 ±1.4 +4 LSB Integral Linearity “F” INL –6 ±2 +6 LSB Differential Linearity “F” DNL TA = +25°C–1 ±0.5 +1.5 LSB Differential Linearity “F” DNL –1.5 ±0.6 +2 LSB Zero Scale Error ZSE 1 LSB Zero Scale Drift TCZSE 0.025 ppm/ °C Gain Error GE ±0.225 % FS Gain Drift TCGE 5 ppm/ °C REFERENCE2 Reference Input Current IREF Note 2 350 625 µA OUTPUT CHARACTERISTICS Output Current IOUT Note 2 2.8 5.0 mA Output Capacitance COUT 10 pF Settling Time tS 0.003% of Full Scale 500 ns LOGIC CHARACTERISTICS Logic Input High Voltage VINH TA = +25°C 2.4 V Logic Input Low Voltage VINL TA = +25°C 0.8 V Logic Input Current IINH VIN = 5.0 V, DB0–DB10 7.5 µA Logic Input Current IINH VIN = 5.0 V, DB11–DB15 100 µA Logic Input Current IINL VIN = 0 V, DB0–DB15 1 µA Input Capacitance CIN 8pF SUPPLY CHARACTERISTICS Power Supply Sensitivity PSS VCC = 4.5 V to 5.5 V, VEE = –13 V to –17 V 20 ppm/V Positive Supply Current ICC All Bits HIGH 15 22 mA Positive Supply Current ICC All Bits LOW 6 7.5 mA Negative Supply Current IEE 7.5 10 mA Power Dissipation PDISS 188 260 mW NOTES 1All supplies can be varied ± 5% and operation is guaranteed. Device is tested with nominal supplies. 2Operation is guaranteed over this reference range, but linearity is neither tested not guaranteed (see Figures 7 and 8). Specifications subject to change without notice. WAFER TEST LIMITS DAC16G Parameter Symbol Conditions Limit Units Integral Nonlinearity INL ±3 LSB max Differential Nonlinearity DNL ±1 LSB max Zero Scale Error ZSE ±1 LSB max Gain Error GE ±12 % FS max Logic Input High Voltage VINH 2.4 V min Logic Input Low Voltage VINL 0.8 V max Logic Input Current IIN 75 µA max Positive Supply Current ICC 20 mA max Negative Supply Current IEE 10 mA max Power Dissipation PDISS 250 mW max NOTE Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing. REV. B –2– (@ VCC = +5.0 V, VEE = –15.0 V, IREF = 0.5 mA, CCOMP = 47 F, TA = Full Operating Tem- perature Range unless otherwise noted. See Note 1 for supply variations.) (@ VCC = +5.0 V, VEE = –15.0 V, IREF = 0.5 mA, CCOMP = 47 F, TA = +25 C unless otherwise noted.) |
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