EVAL-ADE7756EB

–4–

REV. PrB 01/01

PRELIMINARYTECHNICALDATA

JUMEPER

OPTION

DESCRIPTION

JP1

Closed

This will short out R50. The effect is to disable the anti-alias filter on the

analog input V1P. Default Open.

Open

Enable the anti-alias filter on V1P.

JP2

Closed

This will connect the analog input V1P to ground. Default Open.

JP3

Closed

This will short out R51. The effect is to disable the anti-alias filter on the

analog input V1N. Default Open.

Open

Enabe the anti-alias filter on V1N.

JP4

Closed

This will connect the analog input V1N to ground. Default Open.

JP5

A

This connects the buffered logic output IRQ to the LED1.

B

This connects the buffered logic output IRQ to pin 10 on the D-Sub connector

via an optical isolator.

JP6

A

This connects the buffered logic output SAG to the LED2.

B

This connects the buffered logic output SAG to pin 11 on the D-Sub connector

via an optical isolator.

JP7

Closed

This will short the attenuation network on Channel 2. Default open.

JP8

Closed

This will connect the analog input V2P to ground. Default Open.

JP9

Closed

This will short out R57. The effect is to disable the anti-alias filter on the

analog input V2N. Default Open.

Open

Enable the anti-alias filter on V2N.

JP10

Closed

This will connect the analog input V2N to ground. Default Open.

JP11

Closed

This will connect the Analog and Digital ground planes of the PCB. Default

Closed.

JP12

A

This connects the buffered logic output CF to the LED4.

B

This connects the buffered logic output CF to BNC2 connector via an optical

isolator.

JP13

Closed

This will connect an external reference 2.5V (AD780) to the ADE7756.

Open

This will enable the ADE7756 on-chip reference.

JP14

Closed

This will connect the optical isolator ground to the evaluation board gound

(DGND). If full isolation between the evaluation board and PC is required,

this jumper should be left open.

JP15

Closed

This will short out R41. The effect is to disable the phase compensation filter

(for shunts) on the analog input V1P. Default Closed.

JP19

A

This connects the buffered logic output ZX to the LED3.

B

This connects the buffered logic output ZX to pin 12 on the D-Sub connector

via an optical isolator.

JP20

Closed

This connects the AVDD and DVDD supply for the evaluation board together.

Default Closed.

JP21

Closed

This connects the DVDD and +5V (buffers) supply for the evaluation board

together. Default Closed.

JP25

Closed

This will short out R42. The effect is to disable the phase compensation filter

(for shunts) on the analog input V1N. Default Closed.

JP51

Closed

This will short out disconnect Analog input V2P from the ADE7756. Default

Closed.

JUMPER SETTINGS