LP8556

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SNVS871B – JULY 2012 – REVISED SEPTEMBER 2012

PWM Interface Characteristics

(1)

Symbol

Parameter

Condition

Min

Typ

Max

Units

75

25000

Hz

Minimum Pulse ON time

1

μs

Minimum Pulse OFF time

1

Turn on delay from standby to

PWM input active, VDDIO pin transitions

10

ms

backlight on

from 0V to 1.8V.

Turn off delay

PWM input low time for turn off

50

ms

PWM Input Resolution

8

bits

(1)

Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the

most likely norm.

(2)

Guaranteed by design and not tested in production.

Logic Interface Characteristics

(1)

Symbol

Parameter

Condition

Min

Typ

Max

Units

Logic Inputs (PWM, SDA, SCL)

0.3 X

Input Low Level

V

VDDIO

0.7 X

Input High Level

V

VDDIO

-1.0

1.0

Input Current

μA

Logic Outputs (SDA)

Output Low Level

0.3

0.4

V

Output Leakage Current

-1.0

1.0

μA

(1)

Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the

most likely norm.

Copyright © 2012, Texas Instruments Incorporated

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