MAT02

–7–

REV. C

Figure 18. Log Conformance Test Circuit

LOG CONFORMANCE TESTING

The log conformance of the MAT02 is tested using the circuit

shown above. The circuit employs a dual transdiode logarith-

mic converter operating at a fixed ratio of collector currents

that are swept over a 10:1 range. The output of each transdiode

×100 by the AMP01 instrumentation amplifier. The differen-

tial emitter-base voltage (

∆V

dependent dc level plus an ac error voltage which is the devia-

tion from true log conformity as the collector currents vary.

The output of the transdiode logarithmic converter comes

from the idealized intrinsic transistor equation (for silicon):

kT

q

In

where

(1)

k = Boltzmann’s Constant (1.38062

q = Unit Electron Charge (1.60219

T = Absolute Temperature,

°K (= °C + 273.2)

An error term must be added to this equation to allow for the

input current is limited by use of the OP15 BiFET-input op

amp. The resulting AMP01 input is:

∆V

kT

q

In

(2)

A ramp function which sweeps from 1 V to 10 V is converted by

the op amps to a collector current ramp through each transistor.

the previous equation becomes:

∆V

∆r

As viewed on an oscilloscope, the change in

∆V