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SSM2018TP 数据表(PDF) 12 Page - Analog Devices |
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SSM2018TP 数据表(HTML) 12 Page - Analog Devices |
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12 / 16 page ![]() REV. A –12– SSM2018T/SSM2118T A2 A4 Q3 Q4 Q1 Q2 200 1–G G G 1–G 200 1.8k GAIN CORE 14 8 5 16 COMP 2 COMP 1 9 VREF Im SPLITTER +IG 3 1 15 4 2 11 13 12 BAL –I1–G V1–G VC GND MODE –IG COMP 3 7 6 10 V– +IN –IN +I1–G V+ COMPENSATION NETWORK Im–(Is) 2 Im+(Is) 2 A4 –0.1 V to +6.0 V. The negative compliance is much smaller be- cause the gain core transistors (Q1 and Q3) begin to saturate when the collector potential is brought below their base poten- tial. These outputs have high immunity to capacitive loads. In fact, the load on either or both outputs can be as large as 10 nF with no change in the distortion performance. For values above 10 nF, the distortion does start to increase. For example, a 100 nF load causes the distortion to increase from 0.006% to 0.02% at 1 kHz. The noise performance of a single SSM2118T with an OP275 output amplifier is shown in Figure 20. When multiple SSM2118T parts are operated in parallel, the noise does in- crease by a factor equal to the square root of the number of parts paralleled. For example, if five parts are in parallel, the total output noise is 100 nV √(Hz) × √5 = 220 nV/√Hz. Compensating the SSM2018T and SSM2118T Both parts employ the same compensation network. This net- work uses an adaptive compensation scheme that adjusts the op- timum compensation level for a given gain. The control voltage not only adjusts the gain core steering, it also adjusts the com- pensation. The SSM2018T and SSM2118T have three com- pensation pins: COMP1, COMP2, and COMP3. COMP3 is normally left open. Grounding this pin actually defeats the adaptive compensation circuitry, giving the VCA a fixed com- pensation point. The only time that this is desirable is when the VCA has fixed feedback, such as the Voltage Controlled Panner (VCP) circuit shown later in the data sheet. Thus, for the Basic VCA circuit or the OVCE circuit, COMP3 should be left open. A compensation capacitor does need to be added between COMP1 and COMP2. Because the VCA operates over such a wide gain range, ideally the compensation should be optimized for each gain. When the VCA is in high attenuation, there is very little “loop gain,” and the part needs to have high compen- sation. On the other hand, at high gain, the same compensation capacitor would overcompensate the part and roll off the high frequency performance. Thus, the SSM2018T and SSM2118T employ a patented adaptive compensation circuit. The compen- sation capacitor is “Miller” connected between the base and col- lector of an internal transistor. By changing the gain of this transistor via the control voltage, the compensation is changed. Increasing the compensation capacitor causes the frequency re- sponse and slew rate to decrease, which will tend to cause high frequency distortion to increase. For the basic VCA circuit, 47 pF was chosen as the optimal value. The OVCE circuit de- scribed later uses a 220 pF capacitor. The reason for the in- crease is to compensate for the extra phase shift from the additional output amplifier used in the OVCE configuration. The compensation capacitor can be adjusted over a practical range from 47 pF to 220 pF, if desired. Below 47 pF, the parts may oscillate, and above 220 pF the frequency response is sig- nificantly degraded. Control Section As mentioned before, the control voltage on Pin 11 steers the current through the gain core transistors to set the gain. The output gain formula is as follows: V OUT = V IN × e (–aV C ) The exponential term arises from the standard Ebers-Moll equation describing the relationship of a transistor’s collector current as a function of the base-emitter voltage: I C = IS × e (V BE /V T ) . The factor “a” is a function of not only VT but also the scaling due to the resistor divider of the 200 Ω and 1.8 kΩ resistors shown in Figures 38 and 40. The resulting expression for “a” is as follows: a = 1/(10 × V T) which is approximately equal to four at room temperature. Substituting a = 4 in the above equation results in a –28.8 mV/dB control law at room temperature. The –28.8 mV/dB number is slightly different from the data sheet specification of –30 mV/dB. The difference arises from the temperature dependency of the control law. The term VT is known as the thermal voltage, and it has a direct dependency Figure 40. SSM2118T Detailed Functional Diagram |
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