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LT1389 数据表(PDF) 13 Page - Linear Technology |
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LT1389 数据表(HTML) 13 Page - Linear Technology |
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13 / 20 page ![]() LTC3330 13 3330p For more information www.linear.com/LTC3330 OVERVIEW The LTC3330 combines a buck switching regulator and a buck-boost switching regulator to produce an energy harvestingsolutionwithbatterybackup.Theconvertersare controlled by a prioritizer that selects which converter to usebasedontheavailabilityofabatteryand/orharvestable energy. If harvested energy is available the buck regula- tor is active and the buck-boost is OFF. With an optional LDO and supercapacitor balancer and an array of different configurations the LTC3330 suits many applications. BUCK CONVERTER The synchronous buck converter is an ultralow quiescent currentpowersupplytailoredtoenergyharvestingapplica- tions. It is designed to interface directly to a piezoelectric or alternative A/C power source, rectify the input voltage, and store harvested energy on an external capacitor while maintaining a regulated output voltage. It can also bleed off any excess input power via an internal shunt regulator. INTERNAL BRIDGE RECTIFIER An internal full-wave bridge rectifier accessible via the differential AC1 and AC2 inputs rectifies AC sources such as those from a piezoelectric element. The rectified output is stored on a capacitor at the VIN pin and can be used as an energy reservoir for the buck converter. The bridge rectifier has a total drop of about 800mV with typical piezo-generated currents (~10μA), but is capable of carrying up to 50mA. Either side of the bridge can be operated independently as single-ended AC or DC inputs. UNDERVOLTAGE LOCKOUT When the voltage on VIN rises above the UVLO rising threshold the buck converter is enabled and charge is transferred from the input capacitor to the output capaci- tor. When the input capacitor voltage is depleted below the UVLO falling threshold the buck converter is disabled. These thresholds can be set according to Table 4 which offers UVLO rising thresholds from 4V to 18V with large or small hysteresis windows (see Table 4). Extremely low operaTion Figure 1. Ideal VIN, VIN2 and CAP Relationship quiescent current (450nA typical) in UVLO allows energy to accumulate on the input capacitor in situations where energy must be harvested from low power sources. INTERNAL RAIL GENERATION Two internal rails, CAP and VIN2, are generated from VIN and are used to drive the high side PMOS and low side NMOS of the buck converter, respectively. Additionally the VIN2 rail serves as logic high for the UVLO threshold select bits UV[3:0]. The VIN2 rail is regulated at 4.8V above GND while the CAP rail is regulated at 4.8V below VIN. These are not intended to be used as external rails. Bypass capaci- tors are connected to the CAP and VIN2 pins to serve as energy reservoirs for driving the buck switches. When VIN is below 4.8V, VIN2 is equal to VIN and CAP is held at GND. Figure 1 shows the ideal VIN, VIN2 and CAP relationship. VIN (V) 0 18 12 14 16 10 2 4 8 6 0 10 5 3330 F01 15 VIN VIN2 CAP BUCK OPERATION The buck regulator uses a hysteretic voltage algorithm to control the output through internal feedback from the VOUT sense pin. The buck converter charges an output capacitor through an inductor to a value slightly higher than the regulation point. It does this by ramping the inductor current up to 260mA through an internal PMOS switch and then ramping it down to 0mA through an internal NMOS switch. This efficiently delivers energy to the output capacitor. The ramp rate is determined by VIN, |
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