Aeroflex Circuit Technology

2

SCD4419 REV B 10/21/99 Plainview NY (516) 694-6700

CIRCUIT TECHNOLOGY

DATA IN

DATA IN

INHIBIT

LINE TO LINE

OUTPUT

NOTES:

1.DATA and DATA inputs must be complementary waveforms or 50% duty cycle average, with no delays between them.

2.DATA and DATA must be in the same state during off time (both high or low).

Figure 1 - Transmitter Logic Waveforms

Figure 2 - Receiver Logic Waveforms

Note overlap

level devices, the receiver outputs are swapped as shown by the dashed lines.

LINE TO LINE

INPUT

DATA OUT

DATA OUT

overriding “INHIBIT" input provides

for the removal of the transmitter

output from the line. A logic “1”

applied to the “INHIBIT” takes priority

over the condition of the data inputs

and disables the transmitter. (See

Transmitter Logic Waveform, Figure

1).

The transceiver utilizes an active

filter to suppress harmonics above

1MHz.

The Transmitter may be

safely operated at 100% duty cycle

for an indefinite period into a short

circuited 1553 bus.

Receiver

The

Receiver

section

accepts

bi-phase differential data at the input

and produces two TTL signals at the

output. The outputs are DATA and

DATA, and represent positive and

negative excursions of the input

beyond a pre-determined threshold.

(See

Receiver

Logic

Waveform.

Figure 2).

The pre-set internal thresholds will

detect data bus signals exceeding

1.150 Volts P-P and reject signals

less than 0.6 volts P-P when used

with a 1:2.5 turns ratio transformer.

(See Figure 5 for transformer data

and typical connection).