Aeroflex Circuit Technology

SCD4458 REV A 1/29/98 Plainview NY (516) 694-6700

2

two 70 Ohm terminations, the data

bus signal is typically 7.5 volts P-P

at A-A' (See Figure 5). When both

DATA and DATA inputs are held low

or

high,

the

transmitter

output

becomes a high impedance and is

“removed” from the line. In addition,

an

overriding

“INHIBIT

input

provides for the removal of the

transmitter output from the line. A

logic “1” applied to the “INHIBIT”

takes priority over the condition of

the data inputs and disables the

transmitter. (See Transmitter Logic

Waveform,

Figure

1.)

The

Transmitter may be safely operated

for an indefinite period with the bus

(point A-A') short circuited at 100%

duty cycle.

Receiver:

The

Receiver

section

accepts

bi-phase differential data at the input

and produces two TTL signals at the

output. The outputs are DATA

and

DATA, and represent positive and

negative excursions of the input

beyond

a

pre-determined

threshold.(See

Receiver

Logic

Waveform. Figure 2.)

The pre-set internal thresholds will

detect data bus signals exceeding

1.20 Volts P-P and reject signals

less than 0.6 volts P-P when used

with a transformer. (See Figure 5

for transformer data and typical

connection.)

A low level at the Strobe input

inhibits the DATA

and DATA

outputs. If unused, a 2K pull-up to

+5 Volts is recommended

DATA IN

DATA IN

INHIBIT

LINE TO LINE

OUTPUT

Note: DATA and DATA inputs must be complementary waveforms or 50% duty cycle average, with no delays between them,

and must be in the same state during off times (both high or low).

Figure 1 — Transmitter Logic Waveforms Idealized

*

Note overlap

LINE TO LINE

INPUT

DATA OUT

DATA OUT

STROBE

* See Figure 8 For Actual Waveforms