Aeroflex Circuit Technology

SCD4418 REV B 10/18/99 Plainview NY (516) 694-6700

2

Transmitter

The Transmitter section accepts

bi-phase TTL data at the input and

when coupled to the data bus with a

1:1 transformer, isolated on the data

bus side with two 52.5 Ohm fault

isolation resistors, and loaded by

two

70

Ohm

terminations

plus

additional receivers, the data bus

signal

produced

is

7.0

volts

minimum

P-P

at

A-A’.

(See

Figure 5.) When both DATA and

DATA inputs are held low or high,

the transmitter output becomes a

high impedance and is “removed”

from

the

line.

In

addition,

an

overriding “INHIBIT" input provides

for the removal of the transmitter

output from the line. A logic “1”

applied

to

the

“INHIBIT”

takes

priority over the condition of the data

inputs and disables the transmitter.

(See Transmitter Logic Waveforms,

Figure 1.)

The transmitter utilizes an active

filter to suppress harmonics above

1MHz to meet Macair specifications

A-3818,

A-4905,

A-5232

and

A-5690. The transmitter may be

safely operated for an indefinite

period at 100% duty cycle into a

data bus short circuit.

Receiver

The

Receiver

section

accepts

bi-phase differential data at the input

and produces two TTL signals at the

output. The outputs are DATA and

DATA, and represent positive and

negative excursions of the input

beyond a pre-determined threshold.

(See Receiver Logic Waveforms,

Figure 2.)

The internal threshold is nominally

set to detect data bus signals

exceeding 1.05 Volts P-P and reject

signals less than 0.6 volts P-P when

used

with

a

1:1

turns

ratio

transformer.

(See

Figure

5

for

transformer

data

and

typical

connection.) This threshold setting

can

be

held

by

grounding

the

appropriate pins or modified with the

use of external resistors.

A low level at the Strobe input

inhibits the DATA and DATA outputs.

If unused, a 2K pull-up to +5 Volts is

recommended.

DATA IN

DATA IN

INHIBIT

LINE TO LINE

OUTPUT

NOTES:

2. DATA and DATA inputs must be complementary waveforms or 50% duty cycle average, with no delays between them.

3. DATA and DATA must be in the same state during off time (both high or low).

Figure 1 – Transmitter Logic Waveforms

Figure 2 – Receiver Logic Waveforms

Note overlap

devices, the receiver outputs are swapped as shown by the dashed lines

level

LINE TO LINE

INPUT

DATA OUT

DATA OUT

1. Line to line waveforms illustrate Macair signals, MIL-STD-1553 signals are trapezoidal