LIS2DH datasheet(35/50 Pages) STMICROELECTRONICS

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LIS2DH

Registers Description

Doc ID 022516 Rev 1

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7.9

CTRL_REG4 (23h)

I1_AOI2

AOI2 interrupt on INT1 pin. Default value 0.

(0: Disable; 1: Enable)

I1_DRDY1

DRDY1 interrupt on INT1 pin. Default value 0.

(0: Disable; 1: Enable)

I1_DRDY2

DRDY2 interrupt on INT1 pin. Default value 0.

(0: Disable; 1: Enable)

I1_WTM

FIFO Watermark interrupt on INT1 pin. Default value 0.

(0: Disable; 1: Enable)

I1_OVERRUN

FIFO Overrun interrupt on INT1 pin. Default value 0.

(0: Disable; 1: Enable)

Table 33.

CTRL_REG3 description (continued)

Table 34.

CTRL_REG4 register

BDU

BLE(1)

BLE function can be activated only in High Resolution mode

FS1

FS0

ST1

ST0

SIM

Table 35.

CTRL_REG4 description

BDU

Block data update. Default value: 0

(0: continuos update; 1: output registers not updated until MSB and LSB have

been read)

BLE

Big/Little Endian data selection. Default value:0;

(0: data LSb at lower address; 1: data MSb at lower address)

The BLE function can be activated only in High Resolution mode

FS1-FS0

Full Scale selection. Default value: 00

(00: +/- 2G; 01: +/- 4G; 10: +/- 8G; 11: +/- 16G)

Operating mode selection (refer to section 2.6.3: High resolution, Normal

mode, Low power mode)

ST1-ST0

Self Test Enable. Default value: 00

(00: Self Test Disabled; Other: See Table )

SIM

SPI Serial Interface Mode selection. Default value: 0

(0: 4-wire interface; 1: 3-wire interface).

Table 36.

Self test mode configuration

ST1

ST0

Self test mode

Normal mode

Self test 0

Self test 1

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