WM9090ECSSLASHR datasheet(47/81 Pages) WOLFSON

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Production Data

WM9090

PD, November 2010, Rev 4.1

CHARGE PUMP

The WM9090 incorporates a dual-mode Charge Pump which generates the supply rails for the

headphone output drivers, HPOUT1L and HPOUT1R. The Charge Pump has a single supply input,

AVDD, and generates split rails CPVOUTP and CPVOUTN according to the selected mode of

operation. The Charge Pump connections are illustrated in Figure 15 (see “Electrical Characteristics”

for external component values). An input decoupling capacitor may also be required at AVDD,

depending upon the system configuration.

Figure 15 Charge Pump External Connections

The Charge Pump is enabled by setting the CP_ENA bit. When enabled, the charge pump adjusts

the output voltages (CPVOUTP and CPVOUTN) as well as the switching frequency in order to

optimise the power consumption according to the operating conditions.

The Charge Pump mode of operation is selected automatically according to the HPOUT1L_VOL and

HPOUT1R_VOL register settings.

Under the recommended usage conditions of the WM9090, the Charge Pump will be enabled by

running the default headphone Start-Up sequence as described in the “Control Write Sequencer”

section. (Similarly, it will be disabled by running the Shut-Down sequence.) In these cases, the user

does not need to write to the CP_ENA bit.

Note that the charge pump clock is derived from internal clock CLK_SYS which must be enabled by

setting OSC_ENA (see “Clocking Control”). The clock division from CLK_SYS is handled

transparently by the WM9090 without user intervention.

The CP_ENA register bit is defined in Table 27.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R76 (4Ch)

Charge Pump

CP_ENA

Charge Pump Control

0 = Disabled

1 = Enabled

Table 27 Charge Pump Control

WM9090ECS/R 数据表(PDF) 47 Page - Wolfson Microelectronics plc

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