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STM32F207IE 数据表(PDF) 116 Page - STMicroelectronics

部件名 STM32F207IE
功能描述  ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/1284KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
PDF  177 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F207IE 数据表(HTML) 116 Page - STMicroelectronics

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Electrical characteristics
STM32F20xxx
116/177
Doc ID 15818 Rev 9
Equation 1: RAIN max formula
The formula above (Equation 1) is used to determine the maximum external impedance
allowed for an error below 1/4 of LSB. N = 12 (from 12-bit resolution) and k is the number of
sampling periods defined in the ADC_SMPR1 register.
fS
(3)
Sampling rate
(fADC = 30 MHz)
12-bit resolution
Single ADC
--
2
Msps
12-bit resolution
Interleave Dual ADC
mode
-
-
3.75
Msps
12-bit resolution
Interleave Triple ADC
mode
--
6
Msps
IVREF+
(3)
ADC VREF DC current
consumption in conversion mode
fADC = 30 MHz
3 sampling time
12-bit resolution
-
300
500
µA
fADC = 30 MHz
480 sampling time
12-bit resolution
--
16
µA
IVDDA
(3)
ADC VDDA DC current
consumption in conversion mode
fADC = 30 MHz
3 sampling time
12-bit resolution
-1.6
1.8
mA
fADC = 30 MHz
480 sampling time
12-bit resolution
--
60
µA
1.
If IRROFF is set to VDD, this value can be lowered to 1.7 V when the device operates in the 0 to 70 °C temperature range.
2.
It is recommended to maintain the voltage difference between VREF+ and VDDA below 1.8 V.
3.
Based on characterization, not tested in production.
4.
VREF+ is internally connected to VDDA and VREF- is internally connected to VSSA.
5.
RADC maximum value is given for VDD=1.8 V, and minimum value for VDD=3.3 V.
6.
For external triggers, a delay of 1/fPCLK2 must be added to the latency specified in Table 64.
Table 64.
ADC characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RAIN
k0.5
()
fADC CADC
2
N
2
+
()
ln
×
×
-------------------------------------------------------------- RADC
=



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