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STM32F100VCT6 数据表(PDF) 61 Page - STMicroelectronics

部件名 STM32F100VCT6
功能描述  High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces
PDF  98 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F100VCT6 数据表(HTML) 61 Page - STMicroelectronics

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STM32F100xC, STM32F100xD, STM32F100xE
Electrical characteristics
Doc ID 15081 Rev 7
61/98
Table 34.
Synchronous multiplexed NOR/PSRAM read timings(1)(2)
1.
CL = 15 pF.
2.
Preliminary values.
Symbol
Parameter
Min
Max
Unit
tw(CLK)
FSMC_CLK period
27.7
ns
td(CLKL-NExL)
FSMC_CLK low to FSMC_NEx low (x = 0...2)
1.5
ns
td(CLKL-NExH)
FSMC_CLK low to FSMC_NEx high (x = 0...2)
2
ns
td(CLKL-NADVL)
FSMC_CLK low to FSMC_NADV low
4
ns
td(CLKL-NADVH)
FSMC_CLK low to FSMC_NADV high
5
ns
td(CLKL-AV)
FSMC_CLK low to FSMC_Ax valid (x = 16...25)
0
ns
td(CLKL-AIV)
FSMC_CLK low to FSMC_Ax invalid (x = 16...25)
2
ns
td(CLKH-NOEL)
FSMC_CLK high to FSMC_NOE low
1
ns
td(CLKL-NOEH)
FSMC_CLK low to FSMC_NOE high
0.5
ns
td(CLKL-ADV)
FSMC_CLK low to FSMC_AD[15:0] valid
12
ns
td(CLKL-ADIV)
FSMC_CLK low to FSMC_AD[15:0] invalid
0
ns
tsu(ADV-CLKH)
FSMC_A/D[15:0] valid data before FSMC_CLK
high
6
ns
th(CLKH-ADV)
FSMC_A/D[15:0] valid data after FSMC_CLK high 0
ns
tsu(NWAITV-CLKH) FSMC_NWAIT valid before FSMC_CLK high
8
ns
th(CLKH-NWAITV) FSMC_NWAIT valid after FSMC_CLK high
2
ns



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