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PIC16F87 数据表(PDF) 21 Page - Microchip Technology |
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PIC16F87 数据表(HTML) 21 Page - Microchip Technology |
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21 / 230 page ![]() 2002-2013 Microchip Technology Inc. DS30487D-page 21 PIC16F87/88 2.2.2.5 PIR1 Register This register contains the individual flag bits for the peripheral interrupts. REGISTER 2-5: PIR1: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 1 (ADDRESS 0Ch) Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit, or the global enable bit, GIE (INTCON<7>). User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt. U-0 R/W-0 R-0 R-0 R-0 R/W-0 R/W-0 R/W-0 —ADIF(1) RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF bit 7 bit 0 bit 7 Unimplemented: Read as ‘0’ bit 6 ADIF: A/D Converter Interrupt Flag bit(1) 1 = The A/D conversion completed (must be cleared in software) 0 = The A/D conversion is not complete Note 1: This bit is only implemented on the PIC16F88. The bit will read ‘0’ on the PIC16F87. bit 5 RCIF: AUSART Receive Interrupt Flag bit 1 = The AUSART receive buffer is full (cleared by reading RCREG) 0 = The AUSART receive buffer is not full bit 4 TXIF: AUSART Transmit Interrupt Flag bit 1 = The AUSART transmit buffer is empty (cleared by writing to TXREG) 0 = The AUSART transmit buffer is full bit 3 SSPIF: Synchronous Serial Port (SSP) Interrupt Flag bit 1 = The transmission/reception is complete (must be cleared in software) 0 = Waiting to transmit/receive bit 2 CCP1IF: CCP1 Interrupt Flag bit Capture mode: 1 = A TMR1 register capture occurred (must be cleared in software) 0 = No TMR1 register capture occurred Compare mode: 1 = A TMR1 register compare match occurred (must be cleared in software) 0 = No TMR1 register compare match occurred PWM mode: Unused in this mode. bit 1 TMR2IF: TMR2 to PR2 Interrupt Flag bit 1 = A TMR2 to PR2 match occurred (must be cleared in software) 0 = No TMR2 to PR2 match occurred bit 0 TMR1IF: TMR1 Overflow Interrupt Flag bit 1 = The TMR1 register overflowed (must be cleared in software) 0 = The TMR1 register did not overflow Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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