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AD5241BRUZ10-R7 数据表(PDF) 7 Page - Analog Devices

部件名 AD5241BRUZ10-R7
功能描述  I2C-Compatible, 256-Position Digital Potentiometers
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD5241BRUZ10-R7 数据表(HTML) 7 Page - Analog Devices

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AD5241/AD5242
Rev. C | Page 7 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
TOP VIEW
(Not to Scale)
14
1
NC = NO CONNECT
W1
B1
VDD
SHDN
SCL
SDA
O1
NC
O2
VSS
DGND
AD1
AD0
A1
AD5241
2
3
4
5
6
7
13
12
11
10
9
8
Figure 6. AD5241 Pin Configuration
TOP VIEW
(Not to Scale)
1
O1
A1
W1
B1
VDD
SHDN
SCL
SDA
A2
W2
B2
O2
VSS
DGND
AD1
AD0
AD5242
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Figure 7. AD5242 Pin Configuration
Table 4. AD5241 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
A1
Resistor Terminal A1.
2
W1
Wiper Terminal W1.
3
B1
Resistor Terminal B1.
4
VDD
Positive Power Supply, Specified for
Operation from 2.2 V to 5.5 V.
5
SHDN
Active low, asynchronous connection of
Wiper W to Terminal B, and open circuit
of Terminal A. RDAC register contents
unchanged. SHDN should tie to VDD
if not used.
6
SCL
Serial Clock Input.
7
SDA
Serial Data Input/Output.
8
AD0
Programmable Address Bit for Multiple
Package Decoding. Bit AD0 and Bit AD1
provide four possible addresses.
9
AD1
Programmable Address Bit for Multiple
Package Decoding. Bit AD0 and Bit AD1
provide four possible addresses.
10
DGND
Common Ground.
11
VSS
Negative Power Supply, Specified for
Operation from 0 V to −2.7 V.
12
O2
Logic Output Terminal O2.
13
NC
No Connect.
14
O1
Logic Output Terminal O1.
Table 5. AD5242 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
O1
Logic Output Terminal O1.
2
A1
Resistor Terminal A1.
3
W1
Wiper Terminal W1.
4
B1
Resistor Terminal B1.
5
VDD
Positive Power Supply, Specified for
Operation from 2.2 V to 5.5 V.
6
SHDN
Active Low, Asynchronous Connection
of Wiper W to Terminal B, and Open
Circuit of Terminal A. RDAC register
contents unchanged. SHDN should
tie to VDD, if not used.
7
SCL
Serial Clock Input.
8
SDA
Serial Data Input/Output.
9
AD0
Programmable Address Bit for Multiple
Package Decoding. Bit AD0 and Bit AD1
provide four possible addresses.
10
AD1
Programmable Address Bit for Multiple
Package Decoding. Bit AD0 and Bit AD1
provide four possible addresses.
11
DGND
Common Ground.
12
VSS
Negative Power Supply, Specified for
Operation from 0 V to −2.7 V.
13
O2
Logic Output Terminal O2.
14
B2
Resistor Terminal B2.
15
W2
Wiper Terminal W2.
16
A2
Resistor Terminal A2.



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