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EVAL-AD7795EB 数据表(PDF) 21 Page - Analog Devices

部件名 EVAL-AD7795EB
功能描述  6-Channel, Low Noise, Low Power, 24-/16-Bit 誇-? ADC with On-Chip In-Amp and Reference
PDF  36 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

EVAL-AD7795EB 数据表(HTML) 21 Page - Analog Devices

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Rev. D | Page 21 of 36
Table 19. Update Rates Available (Chop Enabled)1
FS3
FS2
FS1
FS0
fADC (Hz)
TSETTLE (ms)
Rejection @ 50 Hz/60 Hz (Internal Clock)
0
0
0
0
x
x
0
0
0
1
470
4
0
0
1
0
242
8
0
0
1
1
123
16
0
1
0
0
62
32
0
1
0
1
50
40
0
1
1
0
39
48
0
1
1
1
33.2
60
1
0
0
0
19.6
101
90 dB (60 Hz only)
1
0
0
1
16.7
120
80 dB (50 Hz only)
1
0
1
0
16.7
120
65 dB (50 Hz and 60 Hz)
1
0
1
1
12.5
160
66 dB (50 Hz and 60 Hz)
1
1
0
0
10
200
69 dB (50 Hz and 60 Hz)
1
1
0
1
8.33
240
70 dB (50 Hz and 60 Hz)
1
1
1
0
6.25
320
72 dB (50 Hz and 60 Hz)
1
1
1
1
4.17
480
74 dB (50 Hz and 60 Hz)
1 With chop disabled, the update rates remain unchanged, but the settling time for each update rate is reduced by a factor of 2. The rejection at 50 Hz/60 Hz for a
16.6 Hz update rate degrades to 60 dB.



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