DAC8043FPZ datasheet(13/16 Pages) AD

13 / 16 page

DAC8043

Rev. E | Page 13 of 16

Bipolar Operation (4-Quadrant)

Figure 19 details a suggested circuit for bipolar, or offset binary,

operation. Table 7 shows the digital input to analog output

relationship. The circuit uses offset binary coding. Twos comple-

ment code can be converted to offset binary by software

inversion of the MSB or by the addition of an external inverter

to the MSB input.

Table 7. Bipolar (Offset Binary) Code Table1, 2

Digital Input

Nominal Analog Output

MSB

LSB

(VOUT as Shown in Figure 19)

1111 1111 1111















2048

2047

REF

1000 0000 0001















2048

REF

1000 0000 0000

0111 1111 1111















2048

REF

0000 0000 0001















2048

2047

REF

0000 0000 0000















2048

REF

1 Nominal full scale for Figure 19 circuits is given by















2048

2047

REF

2 Nominal LSB magnitude for Figure 19 circuits is given by















2048

REF

LSB

Resistors R3, R4, and R5 must be selected to match within 0.01%,

and they all must be of the same (preferably metal foil) type to

ensure temperature coefficient matching. Mismatching between

R3 and R4 causes offset and full-scale errors, while an R5 to R4

and R3 mismatch results in full-scale error.

Calibration is performed by loading the DAC register with 1000

0000 0000 and adjusting R1 until VOUT = 0 V. R1 and R2 may be

omitted, adjusting the ratio of R3 to R4 to yield VOUT = 0 V. Full

scale can be adjusted by loading the DAC register with 1111

1111 1111 and either adjusting the amplitude of VREF or the

value of R5 until the desired VOUT is achieved.

Analog/Digital Division

The transfer function for the DAC8043 connected in the

multiplying mode, as shown in Figure 16, Figure 17, and

Figure 19, is



















...

where AX assumes a value of 1 for an on bit and 0 for an off bit.

The transfer function is modified when the DAC is connected

in the feedback of an operational amplifier, as shown in Figure 18

and becomes























...

The previous transfer function is the division of an analog

voltage (VREF) by a digital word. The amplifier goes to the rails

with all bits off because division by zero is infinity. With all bits

on the gain is 1 (±1 LSB). The gain becomes 4096 with the LSB,

Bit 12, on.

DAC8043

RFB

VDD

LD SRI CLK

VREF

IOUT

GND

DIGITAL

INPUT

VIN

OP42

VOUT

Figure 18. Analog/Digital Divider

VOUT

CONTROL

INPUTS

SERIAL

DATA

INPUT

ANALOG

COMMON

VIN

50Ω

10kΩ

20kΩ

100Ω

10.33pF

1/2

OP200

DAC8043

RFB

VDD

VREF

IOUT

GND

CONTROL

BITS

SRI

1/2

OP200

Figure 19. Bipolar Operation (4-Quadrant, Offset Binary)

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