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M24C02-R 数据表(PDF) 25 Page - STMicroelectronics

部件名 M24C02-R
功能描述  16 Kbit, 8 Kbit, 4 Kbit, 2 Kbit and 1 Kbit serial I²C bus EEPROM
PDF  38 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M24C02-R 数据表(HTML) 25 Page - STMicroelectronics

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M24C16, M24C08, M24C04, M24C02, M24C01
DC and AC parameters
Doc ID 5067 Rev 17
25/38
Table 16.
AC characteristics at 100 kHz (I2C Standard-mode)(1) (M24Cxx-W,
M24Cxx-R, M24Cxx-F)
1.
Values recommended by the I2C bus Standard-mode specification for a robust design of the I2C bus
application. Note that the M24xxx devices decode correctly faster timings as specified in Table 15: AC
characteristics at 400 kHz (I2C Fast-mode) (M24Cxx-W, M24Cxx-R, M24Cxx-F).
Test conditions specified in either Table 6, Table 7 or Table 8 and Table 13
Symbol
Alt.
Parameter
Min.
Max.
Unit
fC
fSCL
Clock frequency
-
100
kHz
tCHCL
tHIGH
Clock pulse width high
4
-
µs
tCLCH
tLOW
Clock pulse width low
4.7
-
µs
tXH1XH2
tR
Input signal rise time
-
1
µs
tXL1XL2
tF
Input signal fall time
-
300
ns
tQL1QL2
(2)
2.
Characterized only.
tF
SDA fall time
-
300
ns
tDXCX
tSU:DAT Data in setup time
250
-
ns
tCLDX
tHD:DAT Data in hold time
0
-
ns
tCLQX
tDH
Data out hold time
200
-
ns
tCLQV
(3)
3.
To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or
rising edge of SDA.
tAA
Clock low to next data valid (access time)
200
3450
ns
tCHDX
(4)
4.
For a reStart condition, or following a Write cycle.
tSU:STA Start condition setup time
4.7
-
µs
tDLCL
tHD:STA Start condition hold time
4
-
µs
tCHDH
tSU:STO Stop condition setup time
4
-
µs
tDHDL
tBUF
Time between Stop condition and next Start
condition
4.7
-
µs
tW
tWR
Write time
-
5
ms



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