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HT24LC02A 数据表(PDF) 3 Page - Holtek Semiconductor Inc |
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HT24LC02A 数据表(HTML) 3 Page - Holtek Semiconductor Inc |
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3 / 11 page ![]() A.C. Characteristics Ta= -40°C ~ +85°C Symbol Parameter Remark VCC=1.8V~5.0V VCC=2.5V~5.0V Unit Min. Max. Min. Max. fSK Clock Frequency ¾¾ 400 ¾ 1000 kHz tHIGH Clock High Time ¾ 600 ¾ 400 ¾ ns tLOW Clock Low Time ¾ 1200 ¾ 600 ¾ ns tr SDA and SCL Rise Time Note ¾ 300 ¾ 300 ns tf SDA and SCL Fall Time Note ¾ 300 ¾ 300 ns tHD:STA START Condition Hold Time After this period the first clock pulse is generated 600 ¾ 250 ¾ ns tSU:STA START Condition Setup Time Only relevant for repeated START condition 600 ¾ 250 ¾ ns tHD:DAT Data Input Hold Time ¾ 0 ¾ 0 ¾ ns tSU:DAT Data Input Setup Time ¾ 150 ¾ 100 ¾ ns tSU:STO STOP Condition Setup Time ¾ 600 ¾ 250 ¾ ns tAA Output Valid from Clock ¾¾ 900 ¾ 600 ns tBUF Bus Free Time Time in which the bus must be free before a new transmission can start 1200 ¾ 500 ¾ ns tSP Input Filter Time Constant (SDA and SCL Pins) Noise suppression time ¾ 50 ¾ 50 ns tWR Write Cycle Time ¾¾ 5 ¾ 5ms Endurance 25 °C, Page Mode 5.0V 1,000,000 Write Cycles Note: These parameters are periodically sampled but not 100% tested. For relative timing, refer to timing diagrams HT24LC02A Rev. 1.00 3 January 29, 2013 |
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