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VIPER06LSTR 数据表(PDF) 5 Page - STMicroelectronics |
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VIPER06LSTR 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 28 page ![]() VIPER06 Pin settings Doc ID 022794 Rev 1 5/28 3 Pin settings Figure 3. Connection diagram (top view) Note: The copper area for heat dissipation has to be designed under the DRAIN pins. DRAIN DRAIN AM11339v1 DRAIN DRAIN DRAIN DRAIN DRAIN GND VDD FB COMP LIM Table 2. Pin description Pin Name Function DIP-7 SSO10 11 GND Connected to the source of the internal power MOSFET and controller ground reference. 22 VDD Supply voltage of the control section. This pin provides the charging current of the external capacitor. 33 LIM This pin allows setting the drain current limitation. The limit can be reduced by connecting an external resistor between this pin and GND. Pin left open if default drain current limitation is used. 44 FB Inverting input of the internal transconductance error amplifier. Connecting the converter output to this pin through a single resistor results in an output voltage equal to the error amplifier reference voltage (see VFB_REF in Table 6). An external resistor divider is required for higher output voltages. 55 COMP Output of the internal transconductance error amplifier. The compensation network has to be placed between this pin and GND to achieve stability and good dynamic performance of the voltage control loop. The pin is used also to directly control the PWM with an optocoupler. The linear voltage range extends from VCOMPL to VCOMPH (Table 6). 7, 8 6-10 DRAIN High-voltage drain pins. The built-in high-voltage switched startup bias current is drawn from these pins too. Pins connected to the metal frame to facilitate heat dissipation. |
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