Theory of operation

STPMS2

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Doc ID 16525 Rev 3

supply inputs. A 1 µF capacitor should be connected between VDDxx and GND. The input of

the regulator is VCC, which also powers the band-gap and bias generators. The band-gap

output is VBG, which should be connected to GND via a 100 nF capacitor.

The analog part of the STPMS2 consists of:

●

pre-amplifier in the current channel

●

1.23 V reference voltage generator (STPMS2L only)

●

+3 V low-drop supply voltage regulator

●

●

BIST DAC

●

●

bias current generators

The voltage channel has a pre-amplification gain of 2, which defines the maximum

differential voltage on voltage channel inputs to ± 300 mV. The relative gain of the current

channel is selectable among 2, 4, 8 or 16, which defines the maximum differential voltage on

the current channel to ± 300 mV, ± 150 mV, ± 75 mV or ± 37.5 mV, respectively. The full

range of gains is available only in soft mode (see Section 8.5), while in hard mode only 2

and 16 are selectable.

generator is implemented as a band gap generator, whose temperature compensation

curve can be selected through configuration.

The low drop regulator fixes and stabilizes the core supply voltage to VDDa = 3 V. All digital

pads tolerate 5 V logic levels.

The STPMS2 is clocked by an external clock signal connected to pin CLK.

The STPMS2L sigma-delta modulators work in several operating modes, shown in Table 7

below.

Figure 16.

Power supply external connection scheme

AM09381v1

VCC

VDDac

VDDa

VBG

MS1

MS0

MS2

VDDav

GND

Analog Supply

3.3 - 5.0 V

1 µF

1 µF

100 nF

1 µF