TDA7491LP

Applications information

Doc ID 13541 Rev 5

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5.5

Internal and external clocks

The clock of the class-D amplifier can be generated internally or can be driven by an

external source.

If two or more class-D amplifiers are used in the same system, it is recommended that all

devices operate at the same clock frequency. This can be implemented by using one

TDA7491LP as master clock, while the other devices are in slave mode, that is, externally

clocked. The clock interconnect is via pin SYNCLK of each device. As explained below,

SYNCLK is an output in master mode and an input in slave mode.

5.5.1

Master mode (internal clock)

In master mode, pin SYNCLK is used as a clock output pin, whose frequency is:

below in Table 8.

5.5.2

Slave mode (external clock)

In order to accept an external clock input, pin ROSC must be left open, that is, floating. This

forces pin SYNCLK to be internally configured as an input as given in Table 8.

The output switching frequency of the slave devices is:

Figure 30.

Master and slave connection

Table 8.

How to set up SYNCLK

Mode

ROSC

SYNCLK

Master

Output

Slave

Floating (not connected)

Input

SYNCLK

ROSC

Rosc

Cosc

ROSC

SYNCLK

39 k

Ω

100 nF

Output

Input

Master

Slave

TDA7491LP

TDA7491LP