ST7LITE29F2 datasheet(123/166 Pages) STMICROELECTRONICS

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ST7LITE20F2 ST7LITE25F2 ST7LITE29F2

Electrical characteristics

Doc ID 8349 Rev 5

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IDD(RC)

RC oscillator current

consumption

TA=25° C, VDD=5 V

−

970(3)

−μA

tsu(RC)

RC oscillator setup time

TA=25° C, VDD=5 V

−−

10(2)

μs

fPLL

x8 PLL input clock

−−

1(3)

−

MHz

tLOCK

PLL Lock time(4)

−−

−

tSTAB

PLL Stabilization time(4)

−−

−

ACCPLL

x8 PLL Accuracy

fRC = 1 MHz@TA=25° C, VDD=4.5 to 5.5 V

−

0.1(5)

−

fRC = 1 MHz@TA=-40 to +85° C, VDD=5 V

−

0.1(5)

−

tw(JIT)

PLL jitter period

fRC = 1 MHz

−

125(6)

−

µs

JITPLL

PLL jitter (

ΔfCPU/fCPU)

−−

1(6)

−

IDD(PLL) PLL current consumption TA=25° C

−

600(3)

−μA

If the RC oscillator clock is selected, to improve clock stability and frequency accuracy, it is recommended to place a

decoupling capacitor, typically 100nF, between the VDD and VSS pins as close as possible to the ST7 device.

See Section 7.1: Internal RC oscillator adjustment.

Data based on characterization results, not tested in production.

After the LOCKED bit is set ACCPLL is max. 10% until tSTAB has elapsed. See Figure 12: PLL output frequency timing

diagram.

Averaged over a 4ms period. After the LOCKED bit is set, a period of tSTAB is required to reach ACCPLL accuracy.

Guaranteed by design.

Table 64.

RC oscillator and PLL characteristics (tested for TA = -40 to +85°C) @ VDD =4.5 to

5.5 V (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 65.

RC oscillator and PLL characteristics (tested for TA = -40 to +85°C) @ VDD = 2.7 to

3.3V

Symbol

Parameter

Conditions

Min

Typ

Max Unit

fRC

(1)

Internal RC oscillator

frequency(1)

RCCR = FF (reset value), TA=25 °C, VDD= 3.0V

−

560

−

kHz

RCCR=RCCR1(3) ,TA=25°C, VDD= 3 V

−

700

−

ACCRC

Accuracy of Internal RC

oscillator when calibrated

with RCCR=RCCR1(2)(3)

TA=25°C,VDD=3V

-2

−

TA=25°C,VDD=2.7 t 3.3V

-25

−

+25

TA=-40 to +85°C,VDD=3V

-15

−

IDD(RC)

RC oscillator current

consumption

TA=25°C,VDD=3V

−

700(2)

−μA

tsu(RC)

RC oscillator setup time

TA=25°C,VDD=3V

−−

10(3)

μs

fPLL

x4 PLL input clock

−−

0.7(2)

−

MHz

tLOCK

PLL Lock time(4)

−−

−

tSTAB

PLL Stabilization time(4)

−−

−

ACCPLL x4 PLL Accuracy

fRC = 1MHz@TA=25°C,VDD=2.7 to 3.3V

−

0.1(5)

−

fRC = 1MHz@TA=40 to +85°C,VDD= 3V

−

0.1(5)

−

tw(JIT)

PLL jitter period

fRC = 1MHz

−

125(6)

−

µs

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