ADL5501

Rev. B | Page 18 of

28

APPLICATIONS INFORMATION

BASIC CONNECTIONS

Figure 40 shows the basic connections for the ADL5501. The

device is powered by a single supply of between 2.7 V and 5.5 V,

with a quiescent current of 1.1 mA. The VPOS pin is decoupled

using 100 pF and 0.1 μF capacitors.

The ADL5501 RF input does not require external termination

components because it is internally matched for an overall

broadband input impedance of 50 Ω.

1

6

2

5

3

4

ADL5501

VPOS

FLTR

RFIN

VRMS

ENBL

COMM

RFIN

VRMS

100pF

0.1µF

Figure 40. Basic Connections for the ADL5501

OUTPUT SWING

At 900 MHz, the output voltage is nominally 6.3 times the input

rms voltage (a conversion gain of 6.3 V/V rms). The output voltage

swings from near ground to 4.9 V on a 5.0 V supply.

Figure 41 shows the output swing of the ADL5501 to a CW input

for various supply voltages. It is clear from Figure 41 that

operating the device at lower supply voltages reduces the

dynamic range as the output headroom decreases.

10

0.03

0.1

1

–25

–20

–15

–10

–5

0

5

10

15

INPUT (dBm)

5.5V

5.0V

2.7V

3.0V

Figure 41. Output Swing for Supply Voltages of 2.7 V, 3.0 V, 5.0 V, and 5.5 V

LINEARITY

Because the ADL5501 is a linear-responding device, plots of

output voltage vs. input voltage result in a straight line. It is more

useful to plot the error on a logarithmic scale, as shown in

Figure 42. The deviation of the plot for the ideal straight-line

characteristic is caused by output clipping at the high end and

by signal offsets at the low end. However, it should be noted that

offsets at the low end can be either positive or negative; therefore,

this plot could also trend upwards at the low end. Figure 10

through Figure 12 and Figure 16 through Figure 18 show error

distributions for a large population of devices at specific

frequencies.

3

2

1

0

–1

–2

–3

–25

15

10

5

0

–5

–10

–15

–20

INPUT (dBm)

100MHz

450MHz

900MHz

1900MHz

2350MHz

2700MHz

4000MHz

5000MHz

6000MHz

It is also apparent in Figure 42 that the error plot tends to shift

to the right with increasing frequency. The squaring cell has an

input impedance that decreases with frequency. The matching

network compensates for the change and maintains the input

impedance at a nominal 50 Ω. The result is a decrease in the

actual voltage across the squaring cell as the frequency increases,

reducing the conversion gain. Similarly, conversion gain is less

at frequencies near 100 MHz because of the small on-chip

coupling capacitor.