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ADMP621 数据表(PDF) 6 Page - Analog Devices |
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ADMP621 数据表(HTML) 6 Page - Analog Devices |
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6 / 16 page ![]() ADMP621 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 3 CLK L/R SELECT GND DATA VDD 4 5 2 1 Figure 5. Pin Configuration (Bottom View) Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 CLK Clock Input to Microphone. 2 L/R SELECT Left Channel or Right Channel Select. DATA1 (right): L/R SELECT tied to GND. DATA2 (left): L/R SELECT tied to VDD. 3 GND Ground. 4 VDD Power Supply. To avoid potential parasitic artifacts and for best performance, placing a 0.1 µF (100 nF) ceramic type, X7R capacitor between Pin 4 (VDD) and ground is strongly recommended. Place the capacitor as close to Pin 4 as possible. 5 DATA Digital Output Signal (DATA1, DATA2). Rev. 0 | Page 6 of 16 |
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