AD5700/AD5700-1

Data Sheet

Rev. D | Page 18 of 24

As previously mentioned, Figure 27 shows an example secondary

HART device, incorporating two-stage protection circuitry. In

this example, a bidirectional (for protection against both positive

and negative high voltage transients) TVS is included to provide

flexibility in the polarity of the connection points of the module.

Because this module could be connected to any point on the

current loop, the higher TVS rating was chosen. The lower

rated second stage provides added protection for the AD5700/

AD5700-1 device.

TYPICAL CONNECTION DIAGRAMS

Figure 28 shows a typical connection diagram for the AD5700/

AD5700-1 using the external and internal options. See the

Connecting to HART_IN or ADC_IP section for more details.

The AD5700/AD5700-1 are designed to interface easily with

Analog Devices, Inc., innovative portfolio of industrial

converters like the AD5421 loop-powered current-output DAC,

the AD5410/AD5420 and AD5412/AD5422 family of line-

powered current-output DACs, and the AD5755-1, a quad DAC

with innovative dynamic power control technology. The

combination of Analog Devices industrial converters and the

AD5700/AD5700-1 greatly simplifies system design, enhancing

reliability while reducing overall PCB size.

Figure 29 shows how the AD5700/AD5700-1 HART modem

can be interfaced with the AD5421 (4 mA to 20 mA loop-powered

DAC) and the ADuCM360 microcontroller to construct a loop

powered transmitter circuit. The HART signal from

The HART enabled smart transmitter reference demo circuit

(the block diagram shown in Figure 30) was developed by

Analog Devices and uses the AD5421, a 16-bit, loop-powered,

4 mA to 20 mA DAC, the ADuCM360 microcontroller and the

AD5700 modem. This circuit has been compliance tested,

verified, and registered as an approved HART solution by the

HART Communication Foundation. Contact your sales

representative for further information about this demo circuit.

In conclusion, the AD5700/AD5700-1 enable quick and easy

deployment of a robust HART-compliant system.

Figure 28. AD5700/AD5700-1 Typical Connection Diagram for External and Internal Filter Options

10µF

0.1µF

0.1µF

1µF

10µF

150pF

1µF

1.71V TO 5.5V

1.71V TO 5.5V

AGND

AD5700/AD5700-1

150kΩ

1.2MΩ

1.2MΩ

300pF

REF

HART_OUT

DGND

CONFIGURATION

PINS

HART_IN

ADC_IP

CD

RXD

TXD

RTS

10µF

0.1µF

1µF

1.71V TO 5.5V

AGND

AD5700/AD5700-1

REF

HART_OUT

DGND

CONFIGURATION

PINS

HART_IN

ADC_IP

CD

RXD

TXD

RTS

680pF

2.2nF

1µF

+

0.1µF

10µF

1.71V TO 5.5V

+