Data Sheet

AD8436

Rev. B | Page 15 of 24

16kΩ

16kΩ

16kΩ

16kΩ

OGND

OBUFOUT

OBUFIN+

OBUFIN–

–

+

CORE

C

8

14

13

12

9

OUT

2C

Figure 36. Output Buffer Amplifier Configured as a Two-Pole, Sallen-Key

Low-Pass Filter

Configure the output buffer (see Figure 37) to invert dc output.

OUT

16kΩ

16kΩ

OGND

OBUFOUT

OBUFIN+

OBUFIN–

CORE

32.4kΩ

8

14

12

13

9

–

+

Figure 37. Inverting Output Configuration

Current Output Option

If a current output is required, connect the current output,

OUT, to the destination load. To maximize precision, provide a

means for external calibration to replace the internal trimmed

resistor, which is bypassed. This configuration is useful for conve-

nient summing of the AD8436 result with another voltage, or

for polarity inversion.

–

+

8kΩ

15kΩ

16kΩ

19

CAVG

18

CCF

9

OUT

2

RMS

8

OGND

DIRECTION OF

DC OUTPUT

CURRENT

2kΩ

(OPTIONAL)

INVERTED DC

VOLTAGE

OUTPUT

32.4kΩ

DO NOT CONNECT FOR

CURRENT OUTPUT

CORE

Figure 38. Connections for Current Output Showing Voltage Inversion

Single Supply

Connections for single supply operation are shown in Figure 39

and are similar to those for dual power supply when the device is

ac-coupled. The analog inputs are all biased to half the supply

voltage, but the output remains referred to ground because the

output of the AD8436 is a current source. An additional bypass

connection is required at IGND to suppress ambient noise.

IGND

4.7µF

RMS

10µF

0.47µF

VEE

CAV

VCC

OGND

2

11

10

19

8

9

17

10MΩ

4

5

3

IBUFOUT

IBUFIN+

IBUFIN–

OUT

AD8436

4.7µF

Figure 39. Connections for Single Supply Operation

Recommended Application

Figure 40 shows a circuit for a typical application for frequencies

as low as power line, and above. The recommended averaging,

crest factor and LPF capacitor values are 10 μF, 0.1 μF and

3.3 μF. Refer to the Using the Output Buffer section if additional

low-pass filtering is required.

AC IN

VCC

VEE

DC

OUT

10MΩ

VEE

CAVG

VCC

OBUFOUT

IGND

OBUFIN+

OBUFIN–

OBUFV+

OUT

DNC

IBUFIN–

IBUFOUT

IBUFIN+

SUM

IBUFV+

1

4

3

2

5

8

7

6

9

12

11

10

16

15

14

13

10µF

0.47µF

OGND

IBUFGN

CCF

10µF

+

19

18

17

20

DNC

RMS

3.3µF

0.1µF

AD8436

Figure 40. Typical Application Circuit

Converting to Average Rectified Value

To configure the AD8436 for rectified average instead of rms

conversion, simply reduce the value of CAVG to 470 pF (see

Figure 41). To enable both modes of operation, insert a switch

between capacitor CAVG and Pin CAVG.