CS1615-FSZ datasheet(5/16 Pages) APEX

5 / 16 page

CS1615/16

DS961F1

Notes:

1. The CS1615/16 has an internal shunt regulator that limits the voltage on the VDD pin. Shunt regulation voltage VZ is defined in

the VDD Supply Voltage section on page 4.

2. For test purposes, load capacitance CL is connected to pin GD and is equal to 0.25nF.

3. External circuitry should be designed to ensure that the ZCD current drawn from the internal clamp diode when it is forward biased

does not exceed specification.

4. Protection is implemented using pin FBSENSE. See the CS1615/16 Block Diagram on page 2.

5. Protection is implemented using pin FBAUX. See the CS1615/16 Block Diagram on page 2

6. The conductance is specified in Siemens (S or 1/

). Each LSB of the internal ADC corresponds to 250nS or one parallel 4M

resistor. Full scale corresponds to 256 parallel 4M

 resistors or 15.625k.

Specifications are guaranteed by design and are characterized and correlated using statistical process methods.

Flyback/Buck-boost Protections

Overcurrent Protection (OCP)

(Note 4)

VOCP(th)

-1.69

Overvoltage Protection (OVP)

(Note 5)

VOVP(th)

-1.25

Open Loop Protection (OLP)

(Note 4)

VOLP(th)

-200

External Overtemperature Protection (eOTP)

Pull-up Current Source – Maximum

ICONNECT

-80

A

Conductance Accuracy

(Note 6)

±5



Conductance Offset

(Note 6)

-±250

Current Source Voltage Threshold

VCONNECT(th)

-1.25

Internal Overtemperature Protection (iOTP)

Thermal Shutdown Threshold

(Note 7)

TSD

-135

ºC

Thermal Shutdown Hysteresis

(Note 7)

TSD(Hy)

-14

ºC

Parameter

Condition

Symbol

Min

Typ

Max

Unit

CS1615-FSZ 数据表(PDF) 5 Page - Cirrus Logic

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