AD7960

Data Sheet

Rev. 0 | Page 22 of 24

APPLICATIONS INFORMATION

LAYOUT

Design the printed circuit board that houses the AD7960 so that

the analog and digital sections are separated and confined to

certain areas of the board. Avoid running digital lines under the

device because these couple noise onto the device unless a

ground plane under the AD7960 is used as a shield. Do not run

fast switching signals, such as CNV± or CLK±, near analog

signal paths. Avoid crossover of digital and analog signals. Use

at least one ground plane. It can be common or split between

the digital and analog sections. In the latter case, join the planes

underneath the AD7960 devices.

The AD7960 voltage reference input pin, REF, has dynamic

input impedance. Decouple REF with minimal parasitic

inductances by placing the reference decoupling ceramic

capacitor close to and, ideally, right up against the REF and

REF_GND pins and connecting them with wide, low impedance

traces.

Finally, decouple the VDD1, VDD2, and VIO power supplies of

the AD7960 with ceramic capacitors, typically 100 nF, placed

close to the AD7960 and connected using short, wide traces to

provide low impedance paths and to reduce the effect of glitches

on the power supply lines.

EVALUATING AD7960 PERFORMANCE

Other recommended guidelines for the AD7960 schematic and

layout are outlined in the user guide of the EVAL-AD7960FMCZ

board (UG-490). The fully assembled and tested evaluation

board, user guide, and software for controlling the EVAL-

AD7960FMCZ board from a PC via the EVAL-SDP-CH1Z are

available from the Analog Devices website at www.analog.com.