AD5545/AD5555

Data Sheet

Rev. G | Page 12 of 24

APPLICATIONS INFORMATION

STABILITY

AD5545/AD5555

AD8628

U1

U2

C1

GND

02918- 0- 020

Figure 21. Operational Compensation Capacitor for Gain Peaking

Prevention

inverting node of the op amp must be connected as close as

possible, and proper PCB layout techniques must be employed.

Because every code change corresponds to a step function, gain

peaking may occur if the op amp has limited GBP, and if there

is excessive parasitic capacitance at the inverting node.

An optional compensation capacitor, C1, can be added for

stability as shown in Figure 21. C1 should be found empirically,

but 6 pF is generally more than adequate for the compensation.

POSITIVE VOLTAGE OUTPUT

To achieve the positive voltage output, an applied negative

reference to the input of the DAC is preferred over the output

inversion through an inverting amplifier because of the

resistors’ tolerance errors. To generate a negative reference, the

and GND pins of the reference become the virtual ground and

−2.5 V, respectively (see Figure 22).

AD5545/AD5555

1/2

AD8628

1/2

AD8620

ADR03

GND

GND

02918- 0- 021

U2

U1

+5V

V+

–5V

V–

+5V

–2.5V

U3

C1

U4

Figure 22. Positive Voltage Output Configuration

BIPOLAR OUTPUT

The AD5545/AD5555 is inherently a 2-quadrant multiplying

DAC. It can easily be set up for unipolar output operation. The

full-scale output polarity is the inverse of the reference input

voltage.

In some applications, it may be necessary to generate the full

4-quadrant multiplying capability or a bipolar output swing. This

is easily accomplished by using an additional external amplifier,

U4, configured as a summing amplifier (see Figure 23). In this

circuit, the second amplifier, U4, provides a gain of 2, which

increases the output span magnitude to 5 V. Biasing the external

amplifier with a 2.5 V offset from the reference voltage results in a

full 4-quadrant multiplying circuit. The transfer equation of this

circuit shows that both negative and positive output voltages are

created because the input data (D) is incremented from code zero

+2.5 V).

(3)

(4)

For the AD5545, the external resistance tolerance becomes the

dominant error that users should be aware of.

AD5545/AD5555

1/2

AD8620

1/2

AD8620

ADR03

GND

GND

02918- 0- 022

U2

U3

U1

+5V

+5V

V+

–5V

5V

V–

U4

C1

C2

R1

10k

Ω±0.01% 10kΩ±0.01%

5k

Ω±0.01%

R2

R3

Figure 23. Four-Quadrant Multiplying Application Circuit