HCS200-SLASHP datasheet(6/34 Pages) MICROCHIP

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HCS200

DS40138D-page 6

3.0

EEPROM MEMORY

ORGANIZATION

The HCS200 contains 192 bits (12 x 16-bit words) of

EEPROM memory (Table 3-1). This EEPROM array is

used to store the crypt key information, synchronization

value, etc. Further descriptions of the memory array is

given in the following sections.

TABLE 3-1:

EEPROM MEMORY MAP

3.1

Key_0 - Key_3 (64-Bit Crypt Key)

The 64-bit crypt key is used to create the encrypted

message transmitted to the receiver. This key is calcu-

lated and programmed during production using a key

generation algorithm. The key generation algorithm

may be different from the KEELOQ algorithm. Inputs to

the key generation algorithm are typically the transmit-

ter’s serial number and the 64-bit manufacturer’s code.

While the key generation algorithm supplied from

Microchip is the typical method used, a user may elect

to create their own method of key generation. This may

be done providing that the decoder is programmed with

the

same

means

creating

the

key

for

decryption purposes.

3.2

SYNC (Synchronization Counter)

This is the 16-bit synchronization value that is used to

create the hopping code for transmission. This value

will increment after every transmission.

3.3

Reserved

Must be initialized to 0000H.

3.4

SER_0, SER_1

(Encoder Serial Number)

SER_0 and SER_1 are the lower and upper words of

the device serial number, respectively. Although there

are 32 bits allocated for the serial number, only the

lower order 28 bits are transmitted. The serial number

is meant to be unique for every transmitter.

3.5

SEED_0, SEED_1 (Seed Word)

The 2-word (32-bit) seed code will be transmitted when

all three buttons are pressed at the same time (see

Figure 4-2). This allows the system designer to imple-

ment the secure learn feature or use this fixed code

word as part of a different key generation/tracking pro-

cess.

3.6

Configuration Word

The 16-bit Configuration Word stored in the EEPROM

array contains information required to form the

encrypted portion of the transmission, as well as the

device option configurations. The following sections

further explain these bits.

TABLE 3-2:

CONFIGURATION WORD

3.6.1

DISCRIMINATION VALUE

(DISC0 TO DISC11)

The discrimination value aids the post-decryption

check on the decoder end. It may be any value, but in

a typical system it will be programmed as the 12 Least

Significant bits of the serial number. Values other than

this must be separately stored by the receiver when a

transmitter is learned. The discrimination bits are part

of the information that form the encrypted portion of

the transmission (Figure 4-2). After the receiver has

decrypted a transmission, the discrimination bits are

WORD

ADDRESS

MNEMONIC

DESCRIPTION

KEY_0

64-bit crypt key

(word 0) LSb’s

KEY_1

64-bit crypt key

(word 1)

KEY_2

64-bit crypt key

(word 2)

KEY_3

64-bit crypt key

(word 3) MSb’s

SYNC

16-bit synchronization

value

Reserved

Set to 0000H

SER_0

Device Serial Number

(word 0) LSb’s

SER_1

Device Serial Number

(word 1) MSb’s

SEED_0

Seed Value (word 0)

SEED_1

Seed Value (word 1)

Reserved

Set to 0000H

CONFIG

Configuration Word

Bit Number

Bit Description

Discrimination Bit 0

Discrimination Bit 1

Discrimination Bit 2

Discrimination Bit 3

Discrimination Bit 4

Discrimination Bit 5

Discrimination Bit 6

Discrimination Bit 7

Discrimination Bit 8

Discrimination Bit 9

Discrimination Bit 10

Discrimination Bit 11

Low Voltage Trip Point Select (VLOW

SEL

)

Baudrate Select Bit 0 (BSL0)

Reserved, set to 0

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