FDC37C78-HT datasheet(56/82 Pages) MICROCHIP

56 / 82 page

When both GAP and WGATE bits of the

PERPENDICULAR MODE COMMAND are both

programmed to "0" (Conventional mode), then D0,

D1, D2, D3, and D4 can be programmed

independently to "1" for that drive to be set

automatically to Perpendicular mode. In this mode

the following set of conditions also apply:

1. The GAP2 written to a perpendicular drive

during a write operation will depend upon the

programmed data rate.

2. The

write

pre-compensation

given

perpendicular mode drive wil be 0ns.

3. For D0-D3 programmed to "0" for conventional

mode drives any data written will be at the

currently programmed write pre-compensation.

Note:

Bits D0-D3 can only be overwritten when

OW is programmed as a "1".

If either

GAP or WGATE is a "1" then D0-D3 are

ignored.

Software and hardware resets have the following

effect

the

PERPENDICULAR

MODE

COMMAND:

1. "Software" resets (via the DOR or DSR

registers) will only clear GAP and WGATE bits

to "0". D0-D3 are unaffected and retain their

previous value.

2. "Hardware" resets will clear all bits ( GAP,

WGATE and D0-D3) to "0", i.e all conventional

mode.

Table 29 - Effects of WGATE and GAP Bits

WGATE

GAP

MODE

LENGTH OF

GAP2 FORMAT

FIELD

PORTION OF GAP 2

WRITTEN BY WRITE

DATA OPERATION

Conventional

Perpendicular

(500 Kbps)

Reserved

(Conventional)

Perpendicular

(1 Mbps)

22 Bytes

41 Bytes

0 Bytes

19 Bytes

0 Bytes

38 Bytes

FDC37C78-HT 数据表(PDF) 56 Page - Microchip Technology

FDC37C78-HT 数据表(HTML) 56 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

数据表下载