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MPC8314CVRADDA 数据表(PDF) 81 Page - Freescale Semiconductor, Inc |
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MPC8314CVRADDA 数据表(HTML) 81 Page - Freescale Semiconductor, Inc |
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81 / 101 page  MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 81 Package and Pin Listings TSEC1_GTX_CLK/USBDR_TXDRXD2 K5 I/O LVDD1_OFF 3 TSEC1_RX_CLK/USBDR_TXDRXD3 J4 I/O LVDD1_OFF — TSCE1_RX_DV/USBDR_TXDRXD4 J2 I/O LVDD1_OFF — TSEC1_RXD[3]/USBDR_TXDRXD5 G1 I/O LVDD1_OFF — TSEC1_RXD[2]/USBDR_TXDRXD6 H3 I/O LVDD1_OFF — TSEC1_RXD[1]/USBDR_TXDRXD7/TSEC _TMR_CLK J5 I/O LVDD1_OFF — TSEC1_RXD[0]/USBDR_NXT/TSEC_TMR _TRIG1 H2 I LVDD1_OFF — TSEC1_RX_ER/USBDR_DIR/TSEC_TMR_ TRIG2 H5 I LVDD1_OFF — TSEC1_TX_CLK/USBDR_CLK G2 I LVDD1_OFF — GPIO_28/TSEC1_TXD[3]/TSEC_TMR_GC LK F3 I/O LVDD1_OFF — GPIO_29/TSEC1_TXD[2]/TSEC_TMR_PP1 F2 I/O LVDD1_OFF — GPIO_30/TSEC1_TXD[1]/TSEC_TMR_PP2 F1 I/O LVDD1_OFF — TSEC1_TXD[0]/USBDR_STP/ TSEC_TMR_PP3 G4 O LVDD1_OFF 11 GPIO_31/TSEC1_TX_EN/TSEC_TMR_AL ARM1 F4 I/O LVDD1_OFF — TSEC1_TX_ER/TSEC_TMR_ALARM2 G5 O LVDD1_OFF — TSEC_GTX_CLK125 D1 I NVDD1_ON — TSEC_MDC/LB_POR_CFG_BOOT_ECC E3 I/O NVDD1_ON 9 TSEC_MDIO E2 I/O NVDD1_ON ETSEC2 GPIO_26/TSEC2_COL A8 I/O LVDD2_ON — GPIO_27/TSEC2_CRS E9 I/O LVDD2_ON — TSEC2_GTX_CLK B10 O LVDD2_ON — TSEC2_RX_CLK B8 I LVDD2_ON — TSCE2_RX_DV C9 I LVDD2_ON — TSEC2_RXD[3] C10 I LVDD2_ON — TSEC2_RXD[2] D10 I LVDD2_ON — TSEC2_RXD[1] A9 I LVDD2_ON — TSEC2_RXD[0] B9 I LVDD2_ON — TSEC2_RX_ER A10 I LVDD2_ON — TSEC2_TX_CLK D8 I LVDD2_ON — TSEC2_TXD[3]/CFG_RESET_SOURCE[0] D11 I/O LVDD2_ON — TSEC2_TXD[2]/CFG_RESET_SOURCE[1] C7 I/O LVDD2_ON — Table 66. MPC8314E TEPBGA II Pinout Listing (continued) Signal Package Pin Number Pin Type Power Supply Note |
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