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STM8AF5268 数据表(PDF) 82 Page - STMicroelectronics |
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STM8AF5268 数据表(HTML) 82 Page - STMicroelectronics |
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82 / 110 page  Electrical characteristics STM8AF52/62xx, STM8AF51/61xx 82/110 Doc ID 14395 Rev 9 10.3.11 10-bit ADC characteristics Subject to general operating conditions for VDDA, fMASTER and TA unless otherwise specified. Figure 42. Typical application with ADC 1. Legend: RAIN = external resistance, CAIN = capacitors, Csamp = internal sample and hold capacitor. Table 45. ADC characteristics Symbol Parameter Conditions Min Typ Max Unit fADC ADC clock frequency — 111 kHz — 4 MHz kHz/MHz VDDA Analog supply — 3 — 5.5 V VREF+ Positive reference voltage — 2.75 — VDDA VREF- Negative reference voltage — VSSA —0.5 VAIN Conversion voltage range(1) 1. During the sample time, the sampling capacitance, Csamp (3 pF typ), can be charged/discharged by the external source. The internal resistance of the analog source must allow the capacitance to reach its final voltage level within tS. After the end of the sample time tS, changes of the analog input voltage have no effect on the conversion result. —VSSA —VDDA Devices with external VREF+/ VREF- pins VREF- —VREF+ Csamp Internal sample and hold capacitor — — — 3 pF tS (1) Sampling time (3 x 1/fADC) fADC = 2 MHz — 1.5 — µs fADC = 4 MHz — 0.75 — tSTAB Wakeup time from standby fADC = 2 MHz — 7 — fADC = 4 MHz 3.5 tCONV Total conversion time including sampling time (14 x 1/fADC) fADC = 2 MHz — 7 — fADC = 4 MHz — 3.5 — Rswitch Equivalent switch resistance — — — 30 k Ω AINx STM8A VDD IL VT 0.6V VT 0.6V VAIN RAIN 10-bit A/D conversion CAIN Ts Csamp Rswitch |
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