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PM6644 数据表(PDF) 29 Page - STMicroelectronics |
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PM6644 数据表(HTML) 29 Page - STMicroelectronics |
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29 / 35 page ![]() PM6644 Conclusion Doc ID 023203 Rev 1 29/35 5 Conclusion The device regulates VOUT = 8 V properly with the designed schematic and bill of material. The 12 V input voltage range should have an accuracy of ± 5%. PCB design guidelines The layout is very important in terms of efficiency, stability and system noise. It is possible to refer to the PM6644 evaluation kit board for a complete layout example. For good PC board layout, follow these guidelines: ● Place all the power components (inductors, input and output capacitors) on the top side. Refer them to a ground plan, GND in an inner layer. Connect the exposed pad of the PM6644 to the GND plan with vias (design a GND pad on the top side with the same size as the exposed pad). On the top side connect the GND pin with a short trace to the exposed pad. ● Place input capacitors close to the VIN pin, in order to minimize AC current drops during high-side MOSFET turn-on. Add vias to the GND plan. ● Place the output capacitor close to the GND pin, in order to minimize AC current drops during high-side and low-side MOSFET turn-on. Add vias to the GND plan. ● Place filtering capacitors close to pins REF3, BYP and VCC. ● Place the resistor near the TON pin in order to minimize parasitic capacitance on the TON pin. Figure 31. Recommended layout - top layer Figure 32. Recommended layout - inner layer |
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