IP1827 datasheet(21/39 Pages) IRF

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iP1827

Highly Integrated 25A Single‐input Voltage,

Synchronous Buck Regulator

March 5, 2012 | V1.4

97599

OUTPUT CAPACITOR SELECTION

The voltage ripple and transient requirements determine

the output capacitors type and values. The criteria are

normally based on the value of the Effective Series

Resistance (ESR). However the actual capacitance value

and the Equivalent Series Inductance (ESL) are other

contributing components. These components can be

described as:

(15)

)

(

)

(

)

(

)

(

)

(

)

(

ESL

ESR

ESL

ESR

ESL

ESR









































ΔV0 = Output Voltage Ripple

ΔIL = Inductor Ripple Current

Since the output capacitor has a major role in the overall

performance of the converter and determines the result of

transient response, selection of the capacitor is critical.

The iP1827 can perform well with all types of capacitors.

As a rule, the capacitor must have low enough ESR to meet

output ripple and load transient requirements.

The goal for this design is to meet the voltage ripple

requirement in the smallest possible capacitor size.

Therefore it is advisable to select ceramic capacitors due

to their low ESR and ESL and small size. Fifteen of the

Panasonic ECJ‐2FB0J226ML (22uF, 6.3V, 3mOhm)

capacitors are a good choice.

FEEDBACK COMPENSATION

The iP1827 is a voltage mode controller. The control loop is

a single voltage feedback path including error amplifier

and error comparator. To achieve fast transient response

and accurate output regulation, a compensation circuit is

necessary. The goal of the compensation network is to

provide an open‐loop transfer function with the highest

0 dB crossing frequency and adequate phase margin

(greater than 45

o).

The output LC filter introduces a double pole, ‐40dB/

decade gain slope above its corner resonant frequency,

and a total phase lag of 180

o (see Figure 16). The resonant

frequency of the LC filter is expressed as follows:

(16)







Figure 17 shows gain and phase of the LC filter. Since we

already have 180

o phase shift from the output filter alone,

the system runs the risk of being unstable.

FLC

Frequency

-40dB/decade

0dB

0°

Gain

Phase

-90

-180

FLC

Frequency

0dB

Figure 17: Gain and Phase of LC filter

The iP1827 uses a voltage‐type error amplifier with

high‐gain (110dB) and wide‐bandwidth. The output of

the amplifier is available for DC gain control and AC phase

compensation.

The error amplifier can be compensated either in type II

or type III compensation.

Local feedback with Type II compensation is shown in

Figure 18.

This method requires that the output capacitor should

have enough ESR to satisfy stability requirements.

In general the output capacitor’s ESR generates a zero

typically at 5kHz to 50kHz which is essential for an

acceptable phase margin.

The ESR zero of the output capacitor is expressed as

follows:

(17)

ESR

*ESR*C







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