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USB3813 数据表(PDF) 13 Page - SMSC Corporation

部件名 USB3813
功能描述  USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications
PDF  68 Pages
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制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation

USB3813 数据表(HTML) 13 Page - SMSC Corporation

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USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications
Datasheet
SMSC USB3813
13
Revision 1.0 (06-17-13)
DATASHEET
1
Reference
Clock Select
1 Input
REFSEL1
IS
This signal, combined with REFSEL0, selects the
reference clock input frequency. The reference
select input must be set to correspond to the
frequency applied to the REFCLK input. Refer to
Section 8.4, "Reference Clock," on page 54 for
additional information.
1
System Reset
Input
RESET_N
I_RST
This active-low signal allows external hardware to
reset the device.
Note:
The active-low pulse must be at least
5us wide. Refer to Section 8.3.2,
"External Chip Reset (RESET_N)," on
page 53 for additional information.
1
External USB
Transceiver
Bias Resistor
RBIAS
AI
A 12.0k
Ω (+/- 1%) resistor is attached from
ground to this pin to set the transceiver’s internal
bias settings.
1
Hub Connect
Input
HUB_CONN
IS
This signal is used to control the hub
communication stage. The device will transition
to the hub communications stage when this pin is
asserted high. Two methods of use may be used:
Tie to +3.3V: The hub will automatically transition
to the communications stage when configuration
is complete.
Transition from low to high: The hub will
transition to the communications stage after
configuration is complete and this signal
transitions from low to high.
Refer to Section 8.5, "Hub Connect
(HUB_CONN)," on page 55 for additional
information.
1
Charge
Detect 0
Output
CHRGDET0
O8
This signal, in conjunction with CHRGDET1, can
be configured to communicate information that
can affect the level of current that the system
may draw from the upstream USB VBUS wire.
Refer to Section 8.1.1.1, "Charger Detection
(CHRGDET[1:0])," on page 50 for additional
information.
1
Charge
Detect 1
Output
CHRGDET1
O8
This signal, in conjunction with CHRGDET0, can
be configured to communicate information that
can affect the level of current that the system
may draw from the upstream USB VBUS wire.
Refer to Section 8.1.1.1, "Charger Detection
(CHRGDET[1:0])," on page 50 for additional
information.
Table 3.1 Ball Descriptions (continued)
NUM
BALLS
NAME
SYMBOL
BUFFER
TYPE
DESCRIPTION



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