数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

H5TC4G83AFR-RDA 数据表(PDF) 12 Page - Hynix Semiconductor

部件名 H5TC4G83AFR-RDA
功能描述  4Gb DDR3L SDRAM
PDF  35 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor

H5TC4G83AFR-RDA 数据表(HTML) 12 Page - Hynix Semiconductor

Back Button H5TC4G83AFR-RDA Datasheet HTML 8Page - Hynix Semiconductor H5TC4G83AFR-RDA Datasheet HTML 9Page - Hynix Semiconductor H5TC4G83AFR-RDA Datasheet HTML 10Page - Hynix Semiconductor H5TC4G83AFR-RDA Datasheet HTML 11Page - Hynix Semiconductor H5TC4G83AFR-RDA Datasheet HTML 12Page - Hynix Semiconductor H5TC4G83AFR-RDA Datasheet HTML 13Page - Hynix Semiconductor H5TC4G83AFR-RDA Datasheet HTML 14Page - Hynix Semiconductor H5TC4G83AFR-RDA Datasheet HTML 15Page - Hynix Semiconductor H5TC4G83AFR-RDA Datasheet HTML 16Page - Hynix Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 35 page
background image
Rev. 1.0 / Apr. 2013
12
AC & DC Operating Conditions
Recommended DC Operating Conditions
Recommended DC Operating Conditions - DDR3L (1.35V) operation
Symbol
Parameter
Rating
Units
Notes
Min.
Typ.
Max.
VDD
Supply Voltage
1.283
1.35
1.45
V
1,2,3,4
VDDQ
Supply Voltage for Output
1.283
1.35
1.45
V
1,2,3,4
Notes:
1. Maximum DC value may not be greater than 1.425V. The DC value is the linear average of VDD/VDDQ (t) over a
very long period of time (e.g., 1 sec).
2. If maximum limit is exceeded, input levels shall be governed by DDR3 specifications.
3. Under these supply voltages, the device operates to this DDR3L specification.
4. Once initialized for DDR3L operation, DDR3 operation may only be used if the device is in reset while VDD and
VDDQ are changed for DDR3 operation (see Figure 0).
Recommended DC Operating Conditions - DDR3 (1.5V) operation
Symbol
Parameter
Rating
Units
Notes
Min.
Typ.
Max.
VDD
Supply Voltage
1.425
1.5
1.575
V
1,2,3
VDDQ
Supply Voltage for Output
1.425
1.5
1.575
V
1,2,3
Notes:
1. If minimum limit is exceeded, input levels shall be governed by DDR3L specifications.
2. Under 1.5V operation, this DDR3L device operates to the DDR3 specifications under the same speed timings as
defined for this device.
3. Once initialized for DDR3 operation, DDR3L operation may only be used if the device is in reset while VDD and
VDDQ are changed for DDR3L operation (see Figure 0).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com