| 数据搜索系统,热门电子元器件搜索 |
|
MCP1702 数据表(PDF) 13 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
MCP1702 数据表(HTML) 13 Page - Microchip Technology |
|
13 / 26 page ![]() 2010 Microchip Technology Inc. DS22008E-page 13 MCP1702 5.0 FUNCTIONAL DESCRIPTION The MCP1702 CMOS LDO linear regulator is intended for applications that need the lowest current consumption while maintaining output voltage regulation. The operating continuous load range of the MCP1702 is from 0 mA to 250 mA (VR 2.5V). The input operating voltage range is from 2.7V to 13.2V, making it capable of operating from two or more alkaline cells or single and multiple Li-Ion cell batteries. 5.1 Input The input of the MCP1702 is connected to the source of the P-Channel PMOS pass transistor. As with all LDO circuits, a relatively low source impedance (10 ) is needed to prevent the input impedance from causing the LDO to become unstable. The size and type of the capacitor needed depends heavily on the input source type (battery, power supply) and the output current range of the application. For most applications (up to 100 mA), a 1 µF ceramic capacitor will be sufficient to ensure circuit stability. Larger values can be used to improve circuit AC performance. 5.2 Output The maximum rated continuous output current for the MCP1702 is 250 mA (VR 2.5V). For applications where VR < 2.5V, the maximum output current is 200 mA. A minimum output capacitance of 1.0 µF is required for small signal stability in applications that have up to 250 mA output current capability. The capacitor type can be ceramic, tantalum or aluminum electrolytic. The esr range on the output capacitor can range from 0 to 2.0 . The output capacitor range for ceramic capacitors is 1 µF to 22 µF. Higher output capacitance values may be used for tantalum and electrolytic capacitors. Higher output capacitor values pull the pole of the LDO transfer function inward that results in higher phase shifts which in turn cause a lower crossover frequency. The circuit designer should verify the stability by applying line step and load step testing to their system when using capacitance values greater than 22 µF. 5.3 Output Rise Time When powering up the internal reference output, the typical output rise time of 500 µs is controlled to prevent overshoot of the output voltage. There is also a start-up delay time that ranges from 300 µs to 800 µs based on loading. The start-up time is separate from and precedes the Output Rise Time. The total output delay is the Start-up Delay plus the Output Rise time. |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |