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WRITEVAR8 数据表(PDF) 21 Page - Freescale Semiconductor, Inc

部件名 WRITEVAR8
功能描述  MC3PHAC Monolithic Intelligent Motor Controller
PDF  36 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

WRITEVAR8 数据表(HTML) 21 Page - Freescale Semiconductor, Inc

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Operation
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
Freescale Semiconductor
21
Figure 13. MC3PHAC Configuration for Using a PC as a Master
PC Master Software Operation with the MC3PHAC
When power is first applied to the MC3PHAC, or if a logic low level is applied to the RESET pin, the
MC3PHAC enters PC master software mode if the VBOOST_MODE pin is low during the initialization
phase. The MC3PHAC recognizes a subset of the PC master software command set, which is listed in
Table 5.
With the READVARx commands, the addresses are checked for validity, and the command is executed
only if the address is within proper limits. In general, a read command with an address value below $0060
or above $EE03 will not execute properly, but instead will return an invalid operation response. An
Table 5. Recognized PC Host Software Commands
Command
Description
GETINFOBRIEF
MC3PHAC responds with brief summary of hardware setup and link configuration
information
READVAR8
MC3PHAC reads an 8-bit variable at a specified address and responds with its value
READVAR16
MC3PHAC reads a 16-bit variable at a specified address and responds with its value
READVAR32
MC3PHAC reads a 32-bit variable at a specified address and responds with its value
WRITEVAR8
MC3PHAC writes an 8-bit variable at a specified address
WRITEVAR16
MC3PHAC writes a 16-bit variable at a specified address
Notes:
1. If no external fault circuit is provided, connect to VSS.
2. Use bypass capacitors placed close to the MC3PHAC.
3. Consult crystal/resonator manufacturer for component values.
22 pF
22 pF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
FROM DIVIDED DC BUS
+5 V
10 k
RESET
0.1
µF
NOTE 2
+5 A
MC3PHAC
A
+ 5
NOTE 2
FROM SYSTEM FAULT
DETECTION CIRCUIT
TO RESISTIVE BRAKE DRIVER
VREF
RESET
VDDA
VSSA
OSC2
OSC1
PLLCAP
PWMPOL_BASEFREQ
PWM_U_TOP
PWM_U_BOT
PWM_V_TOP
PWM_V_BOT
PWM_W_TOP
PWM_W_BOT
DC_BUS
ACCEL
SPEED
MUX_IN
START
FWD
VSS
VDD
VBOOST_MODE
DT_FAULTOUT
RBRAKE
RETRY/TxD
PWMFREQ/RxD
FAULTIN
10 k
0.1
µF
NOTE 3
10 M
+5 V
10 k
+5 V
FAULT LED
560
DATA TO PC
DATA FROM PC
ISOLATED
OR NON-ISOLATED
RS232 INTERFACE
CONNECTION
TO HOST
NOTE 1



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