ADE7755

Rev. A | Page 17 of 20

If the on-chip reference is used, actual output frequencies may

vary from device to device due to a reference tolerance of ±8%.

TRANSFER FUNCTION

Frequency Outputs F1 and F2

Example 2

The ADE7755 calculates the product of two voltage signals (on

Channel 1 and Channel 2) and then low-pass filters this product

to extract active power information. This active power information

is then converted to a frequency. The frequency information is

output on F1 and F2 in the form of active low pulses. The pulse

rate at these outputs is relatively low, for example, 0.34 Hz

maximum for ac signals with S0 = S1 = 0 (see Table 7). This

means that the frequency at these outputs is generated from

active power information accumulated over a relatively long

time. The result is an output frequency that is proportional to

the average active power. The averaging of the active power

signal is implicit to the digital-to-frequency conversion. The

output frequency or pulse rate is related to the input voltage

signals by the following equation:

In this example, with ac voltages of ±470 mV peak applied to

V1 and ±660 mV peak applied to V2, the expected output

frequency is calculated as follows:

34

.

0

5

.

2

2

2

7

.

1

1

66

.

0

47

.

0

06

.

8

2

=

×

×

×

×

×

×

=

Freq

where:

Gain = 1, G0 = G1 = 0.

V1 = rms of 470 mV peak ac = 0.47/√2 V.

V2 = rms of 660 mV peak ac = 0.66/√2 V.

If the on-chip reference is used, actual output frequencies may

vary from device to device due to a reference tolerance of ±8%.

2

06

.

8

REF

i

V

f

Gain

V2

V1

Freq

×

×

×

×

=

As can be seen from these two example calculations, the maximum

output frequency for ac inputs is always half that for dc input

signals. Table 7 shows a complete listing of all the maximum

output frequencies.

where:

Freq = output frequency on F1 and F2 (Hz).

V1 = differential rms voltage signal on Channel 1 (volts).

V2 = differential rms voltage signal on Channel 2 (volts).

Gain = 1, 2, 8, or 16, depending on the PGA gain selection

made using logic inputs G0 and G1.

by using the logic inputs S0 and S1, see Table 6.

Table 7. Maximum Output Frequency on F1 and F2

S1

S0

Maximum Frequency

for DC Inputs (Hz)

Maximum Frequency

for AC Inputs (Hz)

0

0

0.68

0.34

0

1

1.36

0.68

1

0

2.72

1.36

1

1

5.44

2.72

S1

S0

XTAL/CLKIN1

Frequency Output CF

0

0

The pulse output CF is intended for use during calibration. The

output pulse rate on CF can be up to 2048 times the pulse rate

the higher the CF scaling (except for the high frequency mode

SCF = 0, S1 = S0 = 1). Table 8 shows how the two frequencies

are related, depending on the state of the logic inputs, S0, S1,

and SCF. Because of its relatively high pulse rate, the frequency

at CF is proportional to the instantaneous active power. As is

the case with F1 and F2, the frequency is derived from the

output of the low-pass filter after multiplication. However, because

the output frequency is high, this active power information is

accumulated over a much shorter time. Therefore, less averaging is

carried out in the digital-to-frequency conversion. With much

less averaging of the active power signal, the CF output is much

more responsive to power fluctuations (see the signal processing

block diagram in Figure 22).

0

1

1

0

1

1

the specified CLKIN frequency is altered.

Example 1

If full-scale differential dc voltages of +470 mV and −660 mV

are applied to V1 and V2, respectively (470 mV is the maximum

differential voltage that can be connected to Channel 1, and

660 mV is the maximum differential voltage that can be

connected to Channel 2), the expected output frequency

is calculated as follows:

2

06

.

8

REF

i

V

f

Gain

V2

V1

Freq

×

×

×

×

=

where:

Gain = 1, G0 = G1 = 0.

V1 = +470 mV dc = 0.47 V (rms of dc = dc).

V2 = −660 mV dc = 0.66 V (rms of dc = |dc|).