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AMC7812B 数据表(PDF) 9 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
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AMC7812B 数据表(HTML) 9 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
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9 / 92 page  AMC7812B www.ti.com SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013 PIN DESCRIPTIONS NAME NO. DESCRIPTION A2 11 Slave address selection A2 for I2C when the SPI/I2C pin is low. ADC-GND 32 ADC ground. Must be connected to AGND. External ADC reference input when external VREF is used to drive the ADC. A compensation capacitor connection ADC-REF-IN/CMP 31 (connect a 4.7-µF capacitor between this pin and AGND) when internal VREF is used to drive the ADC. AGND1 54 Analog ground AGND2 55 Analog ground AGND3 22 Analog ground AGND4 21 Analog ground Global alarm. Open-drain output. An external 10-k Ω, pull-up resistor is required. This pin goes low (active) when one ALARM 62 (or more) analog channels are out of range. Positive analog power for DAC6-OUT, DAC7-OUT, DAC8-OUT, DAC9-OUT, DAC10-OUT, and DAC11-OUT, must be tied AVCC1 56 to AVCC2 Positive analog power for DAC0-OUT, DAC1-OUT, DAC2-OUT, DAC3-OUT, DAC4-OUT, and DAC5-OUT, must be tied to AVCC2 23 AVCC1 AVDD1 49 Positive analog power supply AVDD2 50 Positive analog power supply Analog inputs of channel 0 to 15. CH4 to CH15 are single-ended. CH0, CH1, CH2, and CH3 can be programmed as CH0 to CH15 33-48 differential or single-ended. CNVT 3 External conversion trigger, active low. The falling edge initiates the sampling and conversion of the ADC. CS/A0 9 Chip-select signal for SPI when the SPI/I2C pin is high. Slave address selection A0 for I2C when the SPI/I2C pin is low. D1–/GPIO4 29 Remote sensor D1 negative input when D1 is enabled; GPIO-6 when D1 is disabled. Pull-up resistor required for output. D1+/GPIO-5 30 Remote sensor D1 positive input when D1 is enabled; GPIO-7 when D1 is disabled. Pull-up resistor required for output. D2–/GPIO-6 27 Remote sensor D2 negative input when D2 is enabled; GPIO-6 when D2 is disabled. Pull-up resistor required for output. D2+/GPIO-7 28 Remote sensor D2 positive input when D2 is enabled; GPIO-7 when D2 is disabled. Pull-up resistor required for output. DAC0-OUT 26 DAC channel 0 output DAC1-OUT 25 DAC channel 1 output DAC2-OUT 24 DAC channel 2 output DAC3-OUT 20 DAC channel 3 output DAC4-OUT 19 DAC channel 4 output DAC5-OUT 18 DAC channel 5 output DAC6-OUT 51 DAC channel 6 output DAC7-OUT 52 DAC channel 7 output DAC8-OUT 53 DAC channel 8 output DAC9-OUT 59 DAC channel 9 output DAC10-OUT 60 DAC channel 10 output DAC11-OUT 61 DAC channel 11 output DAC clear control signal, digital input, active low. When low, all DACs associated with the DAC-CLR-0 pin enter a clear state, the DAC latch is loaded with a predefined code, and the output is set to the corresponding level. However, the DAC- DAC-CLR-0 17 data register does not change. When the DAC goes back to normal operation, the DAC latch is loaded with the previous data from the DAC-data register and the output returns to the previous level, regardless of the status of the SLDAC-n bit. When this pin is high, the DACs are in normal operation. DAC clear control signal, digital input, active low. When low, all DACs associated with the DAC-CLR-1 pin enter a clear state, the DAC latch is loaded with a predefined code, and the output is set to the corresponding level. However, the DAC- DAC-CLR-1 63 data register does not change. When the DAC goes back to normal operation, the DAC latch is loaded with the previous data from the DAC-data register and the output returns to the previous level, regardless of the status of the SLDAC-n bit. When this pin is high, the DACs are in normal operation. Data available indicator, active low output. In direct mode, the DAV pin goes low (active) when the conversion ends. In DAV 2 auto mode, a 1-µs pulse (active low) appears on this pin when a conversion cycle completes (see the Primary ADC Operation and Registers sections for details). DAV stays high when deactivated. DGND 6 Digital ground DGND2 64 Digital ground DVDD 8 Digital power supply (+3 V to +5 V). Must be the same value as AVDD. GPIO-0 13 GPIO-1 14 General-purpose digital inputs and outputs. These pins are bidirectional open-drain, digital input and output pins, and require an external pull-up resistor. See the General Purpose Input/Output Pins section for more details. GPIO-2 15 GPIO-3 16 Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: AMC7812B |
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